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Actel introduces firm ARM7 cores for FPGA users

By Michael Santarini, Senior Editor -- EDN, October 24, 2005

Actel's "ARM MPU for the masses" microprocessor-core licensing deal with ARM has come to fruition with the announcement that Actel customers can now license a firm, Actel-architecture-optimized version of the 32-bit ARM7TDMI-S core directly from Actel.

ARM and Actel announced their licensing deal earlier this year, at which time ARM officials said they chose Actel over other vendors largely because Actel's flash-based devices offer better IP (intellectual property) protection than competing offerings. In the past, ARM has zealously guarded its IP, mainly offering direct licensing. But Actel customers can now get the core directly from Actel without negotiating with ARM.

"Up until now there hasn't been a synthesizable ARM solution in the FPGA space," said Dennis Kish, vice president of marketing at Actel. "For people wanting to put a processor in an FPGA, they didn't have many choices—or certainly a popular choice like the ARM7, which is arguably the most used and well-known 32-bit core."

The Actel version of the ARM core, called CoreMP7, does not come in an entirely soft format—such as source Verilog or VHDL code. Instead, it is a firm core. The companies made that choice in part to ensure the core maintains a performance of 25 MHz in Actel devices and in part to ensure the core can't be tampered with or ripped off, Kish said.

The core appears as a black box during the synthesis phase of the design process, but users can adjust the bus interface and peripherals and have "full" control of the I/O, according to the company. To ease configuration of the core's peripherals, Actel offers a new tool called CoreConsole.

The Windows-based tool allows users to configure the processor's peripherals: interrupt controllers, memory controllers, timers, serial interfaces, I/O ports, and power-on reset circuitry. The tool also has repository of other Actel cores complies with the SPIRIT (Structure for Packaging, Integrating and Re-using IP within Tool-flows) standard.

For those already familiar with ARM's RealView development tool suite, Actel also offers an Actel-specific version of RealView.

The core consumes roughly 6000 ProASIC tiles or roughly 250,000 system gates, Kish said. Actel will provide the core free to customers buying ARM-ready M7 ProASIC3 devices; the M7A3P250, M7A3PE600, and M7A3P1000 devices are sampling now. The company expects to offer the core with other FPGA families as well.

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