Altera MAX IIZ CPLD targets portable applications
By Michael Santarini, Senior Editor -- EDN, December 10, 2007
With an eye on winning more sockets in low-power portable applications and more marketshare in the FPGA space, Altera has announced the MAX IIZ, the latest member of its low-power MAX II nonvolatile CPLD lineup.
The new "Zero Power" MAX IIZ is based on Altera's MAX II four-lookup-table architecture, implemented in TSMC's 1.8V, 0.18-nm flash technology. Altera will initially offer the device in two densities: The 240-logic-element EPM240Z and the 570-element EPM570Z. MAX IIZ features I/O counts from 54 to 260.
Dennis Steele, director of product marketing for the MAXII family, said one of the key selling points of IIZ is its extreme low power. The device boasts typical standby power of 29 µA (150 µA maximum). To get these power numbers, Altera tweaked the architecture's power-on reset circuitry to reduce standby power consumption and made the device's transistor threshold voltage a bit higher to reduce standby leakage.
Traditionally, portable application designers have used low-power CPLDs as glue logic, but only sparingly because programmable logic tends to be power hungry, Steele said. Designers typically use CPLDs to handle communications and sometimes power management between a system's main processor and other devices. But Steele argued that the MAX IIZ—which boasts a combination of low power, reasonably high logic-element counts, advanced functionality and high I/O counts—allows designers to use low-cost CPLDs for a broader number of essential tasks in portable applications.
Indeed, the MAX IIZ can perform as a voltage-level shifter, perform GPIO expanding and bridge functions, and serve the processor with extra I/O, as well as function as an interface between the processor and system peripherals. Moreover, Steele said, the device also has something that other CPLDs don't: an internal oscillator.
This mix of functions allows designers to configure a MAX IIZ to work as a low-power coprocessor in handheld devices that mix, for example, phone and MP3 functions. One of the biggest problems handheld-device designers face is that although a device may have long battery life when used solely as a phone, it sucks up battery power quickly when playing music, Steele said. This typically occurs because the ARM-based SOC controlling the system must run at full speed to communicate with the audio codec and media FIFO. The MAX IIZ's internal oscillator allows designers to configure the CPLD as a coprocessor that includes and controls the codec and media FIFO functions at much lower power than the ARM-based SOC, thus saving overall battery power, Steele said.
The company offers each MAX IIZ device in four MBGA packages—5×5 mm, 6×6 mm, 7×7 mm, and 11×11 mm—with I/O counts from 54 to 260. The EPM240Z M68 will cost $1.25 (1 million) and will begin shipping in the first quarter of 2008.
