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Board shuffle: chasing technology

New board-level specifications and updates abound as manufacturers try to keep up with soaring processor performance and gigabit data rates.

By Warren Webb, Technical Editor -- EDN, November 25, 2004

AT A GLANCE
  • Far from extinct, shared-bus architecture prospers with add-ons, such as switched-fabric technology to boost system bandwidth.

  • Embedded versions of the PCI bus take advantage of abundant, low-cost silicon and off-the-shelf operating software.

  • Optional updates to some board-level specifications have created industry fragmentation and product-interoperability issues.

  • The latest board standards incorporate active hot-swap provisions to achieve 99.999% availability.

  • Board standards allow you to trade a higher recurring cost for a significant savings in development costs.



Although traditional shared-bus, board-level technology has been on the brink of extinction for years, designers continue to extract the necessary performance with clever updates, extensions, and all-new standards. So far, the benefits of shared-bus technology outweigh the shortcomings, and it remains the mainstay for high-performance embedded systems. PCI, VME, PC/104, CompactPCI, and the all-new AdvancedTCA are a few of the board architectures that are currently popular with embedded-system designers. Serving a wide range of industrial, medical, military, and consumer applications, these standards outline a basic set of board characteristics along with optional extensions to satisfy unique performance or reliability requirements.

Board standards give designers access to compatible hardware and software to drastically reduce development costs and schedules. A typical project may incorporate an off-the-shelf chassis, a processor, and a user-interface section and reduce the design effort to a single board. Even a single-board design benefits from low-cost silicon and reference designs to simplify the shared-bus interface. Standards-based designs also provide a short cut in the software-development efforts by offering compatible operating systems and available sample drivers or templates. Board standards also eliminate the trial-and-error design iterations to get optimal cooling performance and perfect mechanical alignment.

Yet, many of the advantages of a shared-bus system are eroding as technology delivers higher bandwidths and shorter computing cycles. For example, as you add boards to a bus system to increase performance, you reduce the bandwidth available to each function. Similarly, the bandwidth needed to transfer data between nodes increases with the speed of the processor, yet a conventional bus system has a fixed maximum bandwidth. There are also real-time problems. External events happen randomly, and a bus-based system can service only one incident at a time. If a data transfer is in progress and a higher priority transfer needs the bus, circuitry or software must suspend the lower priority data until the high-priority transfer finishes and then retransmit the blocked data. This contention for the bus is proportional to the number of nodes in the system, and the resulting latency of suspended data becomes intolerable in many real-time applications. Many shared-bus systems still suffer from susceptibility to certain single-board failures that can shut down an entire system.

To deal with these bus limitations and to extend the service life of compatible products, most standards undergo periodic updates to track the latest technology. The most common upgrade is to increase the bus data-transfer rate but allow legacy products to communicate at their original speed. Standards differ on their compatibility with previous-generation hardware; in general, the slowest device wins and sets the data-transfer rate. Although for some applications, the higher bandwidth solves the problem, in most high-performance cases, the fix lasts only until the next-generation processors become available. Several standards have offloaded data-transfer responsibilities to dedicated, point-to-point interconnections, relegating the shared bus to management-only tasks.

Embed the desktop

Although data rates are important, they are only one factor to consider when picking the right bus system for an embedded-system application. Cost, availability, networking configurations, security provisions, power management, software, and board size are a few additional parameters important to embedded-system designers. With its huge stock of desktop software, experienced programmers, and low-cost silicon, the PCI bus is the basis for several standards the embedded world uses and usually receives ample consideration for new development projects.

An industry group led by Intel introduced PCI in the early 1990s as a high-performance alternative to the ISA bus for desktop computers. The initial bus frequency was 33 MHz with a 32-bit-wide parallel datapath yielding a 133-Mbyte/sec data rate. In 1995, the PCI SIG (Special Interest Group) released Version 2.1 of the specification, increasing the bus frequency to 66 MHz and path widths to 64 bits and maintaining backward compatibility with earlier hardware and software. In the late 1990s, the group added PCI-X to the mix to boost clock frequencies to 1 Gbyte/sec. Although every generation is interoperable, each device on the bus must operate at the speed of the slowest installed adapter. In addition, bus sizes are limited in some higher frequency PCI-X configurations to only a single slot.

To head off the relentless increase in data rates, the PCI SIG in 2002 introduced PCI Express, a new device-interconnection architecture. PCI Express offers scalable, high-bandwidth datapaths; packetized data protocols; and compatibility with PCI hardware and driver software. The basic PCI Express link comprises two signal paths that use LVDS (low-voltage differential signaling) and constant-current line drivers to communicate at 2.5 Gbps in each direction. Users can easily increase the bandwidth of an individual PCI Express link by adding signal pairs, called lanes, until they reach the desired performance level. The PCI Express specification supports ×1, ×2, ×4, ×8, ×16, and ×32 lane widths.

Tony Pierce, PCI SIG chairman, offers some insight into the future of PCI: "In addition to the multitude of PCI and PCI-X components in the market, eight systems and 22 add-in cards based on the PCI Express technology have passed the PCI SIG-compliance program and are available for engineers today. PCI SIG will soon release four companion form factor specs: High-End Graphics, Server I/O Module, Wireless, and Cable, which will further expand the capabilities and applications of the PCI Express architecture."

The least costly and most widely used embedded-system design approach is simply to fill a standard desktop-PC chassis with special-purpose PCI cards to create a hybrid system. For example, the 7631A is a new, 16-channel, multiband digital receiver from Pentek that features two 14-bit ADCs with a Virtex-II FPGA for direct wideband-signal processing at sample rates as high as 105 MHz (Figure 1). The receiver costs $6795 and is available with both Linux and Windows drivers. Pentek Vice President Rodger Hosking explains, "The 7631A allows designers to work in a much lower cost desktop environment and still take advantage of some of the high-performance front-end technology."

The shortage of I/O slots and the lack of ruggedness force many system architects to devise other approaches to take advantage of PCI's potential. For example, PICMG (PCI Industrial Computer Manufacturers Group) introduced CompactPCI at the height of the telecommunications boom as a ruggedized embodiment of PCI for embedded systems. With a passive backplane, a Eurocard mechanical configuration, and special connectors, CompactPCI is an effective industrial version of PCI. The low capacitance of pin-and-socket connectors along with board terminations allowed the specification developers to boost the number of CompactPCI slots from four to eight per segment for the 33-MHz clock frequency. They increased the number of slots at 66 MHz from two to five. Many CompactPCI vendors implement multiple PCI segments in each chassis to support additional embedded I/O slots. CompactPCI also implements hot-swapping, a technique similar to PCI's hot-plugging, whereby the system can exchange boards while remaining powered.

Packet switching

PICMG 2.16, one of the most recent additions to the family of specifications, adds to CompactPCI a packet-based switching architecture. The standard defines an Ethernet-based, dual-star system-area network between boards within a CompactPCI chassis. Also called CompactPCI PSB (packet-switched backplane), PICMG 2.16 increases the interboard-communication bandwidth by moving data off the shared PCI bus and onto a high-speed, switched 10/100/1000-Ethernet-based network. Users can improve throughput by as much as an order of magnitude without affecting legacy components or the shared CompactPCI bus. Users can construct a large virtual backplane by extending the network to other chassis with a simple Ethernet cable.

Although development of a new AdvancedTCA form factor may erode part of its telecommunications-market potential, CompactPCI is still popular with developers. For example, Chuck Byers, a Bell Labs Fellow at Lucent Technologies says, "CompactPCI, and especially the related PICMG2.16 Compact Packet Switched Backplane standard, are good choices for many important telecom applications. Using a CompactPCI platform, one can select from many currently available building blocks and implement many different control and management boxes." CompactPCI has also found a home in many applications other than telecom. SBS Technologies' A80 dual-FPGA computing platform supports high-performance applications, such as software-defined radio, radar, sonar, and image and video processing (Figure 2).

With an entirely new approach to board-level standards and the backing of more than 100 major telecom providers and equipment vendors, PICMG in early 2003 released the first AdvancedTCA specification, PICMG 3.0. With a larger form factor, high-availability features, and high-speed fabric interconnections, AdvancedTCA promises to be a viable off-the-shelf alternative to the proprietary equipment prevalent in the telecom industry. The larger 8U board area supports complex circuitry and provides input power and cooling for as much as 200W per slot. One of the first AdvancedTCA single-board computers, the ATCA-710 from Force Computers, features a 1.8-GHz Mobile Intel Pentium 4 Processor, supports carrier-grade Linux, and sells for $3900 in single-unit quantities (Figure 3).

The AdvancedTCA specification provides hot-swapping capability for all boards and active modules, allowing systems to achieve and even exceed the elusive "five-nines" (99.999%) availability. The fabric interface provides a full mesh interconnection, where each slot has a direct connection to every other slot. Because all paths can simultaneously transfer data, a 16-slot, full-mesh backplane has an aggregate available bandwidth of 2.4 Tbps.

To satisfy dissimilar opinions in the industry, the base AdvancedTCA specification does not call out the specific fabric technology for data transport. Instead, a series of subsidiary specifications, identified as PICMG 3.1 through 3.5, define backplane details for Ethernet, Fibre Channel, InfiniBand, StarFabric, PCI Express, and RapidIO. Although competing fabric technologies are not interoperable, this approach prevents the specification from stalling until the marketplace selects a winner. "AdvancedTCA represents a very exciting technology for next-generation platforms serving the telecom and datacom markets.," says PICMG Vice President Rob Davidson. "By virtue of AdvancedTCA's superior backplane bandwidth, board area, cooling, and board-management capabilities, it is capable of serving as the basis for a full product portfolio of converged, broadband-capable network elements."

Stack 'em up

PC/104 was one of the first board-level technologies to package PC architecture into a form factor that fit a variety of embedded applications. Based on the then-dominant ISA bus, PC/104 peripheral cards are simple, low-cost, and easy to design—all prime requirements of embedded products. The relatively low speed of the ISA bus also simplifies noise- and EMI-protection schemes. A PC/104 system comprises a CPU board stacked together with optional peripheral boards. PC/104 cards are fitted with stack-through connectors that eliminate the need for a motherboard, backplane, or card cage. The main reason for the continued popularity of PC/104 is the large number of off-the-shelf products from which designers may choose. Currently, more than 100 manufacturers produce hundreds of PC/104 products. Micro/sys, for example, offers the SBC1625 computer, a network-ready controller in a PC/104 footprint (Figure 4). The PC104 Consortium Web site lists more than 100 members and lets visitors search for PC/104 components by manufacturer or type.

Since PC/104's introduction in 1992, designers have incorporated into it several enhancements to extend performance. The PCI bus has effectively replaced ISA on the desktop, and it was only natural for system architects to add it to PC/104. The PCI bus brings a much higher data rate for high-performance peripherals and application-specific hardware. The specification for the PCI extension, formally known as PC/104-Plus and released in 1997, gives board designers the options of incorporating the ISA bus alone, the PCI and ISA buses together, or the PCI bus alone. In 2003, The PC104 Consortium released the PCI-104 specification, which removes the ISA bus altogether. According to Tom Barnum, president of the PC104 Consortium, "PC/104 captures the power and flexibility of a desktop PC in a size suited for embedded applications. PC/104 and its progeny [PC/104-Plus and PCI-104] offer full hardware and software compatibility with the standard PC/XT and PC/AT architectures in an ultracompact (3.6×3.8-in.), self-stacking, modular format perfect for deeply embedded applications."

First released in 1981, the VMEbus (Versamodule Eurocard bus) standard is the granddaddy of the current crop of embedded-system architectures. VMEbus employs a 3U, 6U, or 9U circuit board with a pin-and-socket connector interface to the backplane for harsh industrial applications. The basic standard defines a master-slave relationship between boards, with asynchronous data transfers based on a variable-speed handshaking protocol. This architecture allows boards of differing speeds to exchange data over the bus at a maximum rate of 40 Mbytes/sec. A single backplane can support as many as 21 boards. Although VMEbus technology is stable, manufacturers regularly introduce new products. For example, Momentum Computer recently introduced a new single-board computer based on the Intel Pentium M Processor that can operate in any slot of a standard VMEbus backplane (Figure 5). The 1.6-GHz version of the Cheetah-V starts at less than $4500. The VMEbus architecture is widely used in industrial, military, aerospace, transportation, and medical embedded applications. The VITA (VMEbus International Trade Association) lists more than 120 members on its Web site.

Data-transfer rates on the VMEbus have increased with each new VITA standard. VME64, approved in 1996, increased data rates to 80 MHz by doubling the path width to 64 bits. Another doubling of the data rate to 160 Mbytes/sec reduces the transfer protocol from a four-edge to a two-edge handshake (2eVME). VME320 defines an all-new backplane design and backward-compatible protocol to increase data transfers to 320 Mbytes/sec. VMEbus has a large software base, and most commercial real-time operating systems support it.

Standards-based products let designers divide their projects into two portions, one of which they can purchase. Off-the-shelf processor modules and standard peripherals fit many embedded systems, leaving design teams to develop, program, debug, and test only the application-specific technology. Board standards may also eliminate power-supply, cooling, and packaging-design efforts, saving untold man-hours spent reinventing common embedded components and subsystems.

You can reach Technical Editor Warren Webb at 1-858-513-3713, fax 1-858-486-3646, e-mail wwebb@edn.comwwebb@edn.com.

 

 




For more information...

For more information on products such as those discussed in this article, contact any of the following manufacturers directly, and please let them know you read about their products in EDN.

Force Computers
www.forcecomputers.com

Micro/sys
www.embeddedsys.com

Momentum Computer
www.momenco.com

PC104 Consortium
www.pc104.org

PCI SIG (PCI Special Interest Group)
www.pcisig.com

Pentek
www.pentek.com

PICMG (PCI Industrial Computer Manufacturers Group)
www.picmg.org

SBS Technologies
www.sbs.com

VITA (VMEbus International Trade Association)
www.vita.com

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