Tool targets yield optimization
By Gabe Moretti -- EDN, September 18, 2003
Process varations at nanometer levels significantly impact yields. Because simulation and nominal optimization tools analyze a design for a fixed set of parameters, they fall short of predicting true parametric yield based on process variations. ChipMD has introduced the DesignMD tool, which includes deterministic-yield-optimization technology to aid engineers in analyzing and understanding the factors that contribute to yield. Designers using the tool can optimize the design to achieve a higher yield across all extremes of the process parameters and for all operating conditions.
DesignMD uses standard Spice netlists as input and outputs the equivalent netlist with optimized design device sizing. Users can select from several analysis options. These include yield optimization to automatically size transistors and other passive devices to achieve higher yields and sensitivity analysis to discover in which direction each design parameter, such as width and length of a transistor or capacitance or inductance value, influences a performance parameter.
The product also offers an extended Monte Carlo analysis to evaluate yield and performance variations with respect to variations in process and operating parameters by determining the worst-case operating parameters at each process point The product also determines the worst-case point and the distance of that point from nominal, using a deterministic algorithm to identify the achievable performance parameter for the target yield. Designers can also identify devices within a circuit that cause mismatch problems and quantify the impact of the problem on the yield. The tool automatically optimizes a design to meet the required yield specification by changing design parameters. Prices for a minimum configuration of ChipMD start at $50,000 for a time-based license.
ChipMD, 1-408-725-9580, www.chipmd.com.
