Flow controller signals four-way go
By Maury Wright -- EDN, October 30, 2003
In today’s world with everything from pictures to video represented digitally, a spate of applications requires sequential data buffers. Such buffers match bus speeds and widths from disparate systems, such as storage and display, and enable multiplexing of data. Typically, designers implement the flow-control circuitry in ASICs or FPGAs and rely on external memory to handle one or more storage queues. IDT, meanwhile, began in June to build a family of off-the-shelf flow-control-management ICs starting with multiplexer-and queue-control chips. Now, the company has two new SFC (sequential-flow-control) ICs that enable four-way simultaneous data transfers.
IDT has identified the communications market as one segment that needs the SFC capabilities, but, realistically, these devices will find use in graphics subsystems, data-acquisition systems, and many other places that need to queue dense and fast data streams.
The new 72T6xxx ICs work with DDR or SDR DRAM in configurations from 128 Mbits to 1 Gbit of memory. The devices simultaneously support data transfers in and out on both the ingress and the egress side of the chip—thus, the four-way claim. The 133-MHz 72T6480 supports buses as wide as 48 bits, and the 166-MHz 72T6360 supports buses as wide as 36 bits. Both chips cost $35 (10,000) and can control 32 separate queues with SDR memory or four separate queues with DDR memory. The chips can handle data-flow at rates as fast as 6 Gbps.
IDT, 1-408-727-6116, www.idt.com.
