Inline equations offer hysteresis switch in PSpice
Edited by Bill Travis and Anne Watson Swager
Christophe Basso, On Semiconductor, Toulouse, France -- EDN, August 16, 2001
Smooth-transition switches are convenient devices in many Spice-based simulators. Their action can greatly ease the convergence process. Unfortunately, these devices lack inherent hysteresis, a helpful feature used to build UVLO (undervoltage-lockout) systems, oscillators, and other systems. Intusoft's (www.intusoft.com) IsSpice4 not only provides users with smooth-transition devices, but also adds the Berkeley Spice primitive switch featuring adjustable hysteresis. Figure 1a shows how to wire this component in a simple comparator architecture. Figure 1b shows the resulting VOUT versus VIN curve. In Cadence's (www.cadence.com) PSpice, the S1 primitive switch implements a soft transition between RON and ROFF, but VON and VOFF are simply the final levels that reflect the specifications for RON and ROFF. To incorporate some hysteresis, you just need to add some analog-behavioral-model sources to help tailor our switching events. Figure 2 shows how you can derive the new device with adjustable hysteresis.
Listing 1 is the complete PSpice netlist for the switch. The inputs V(plus) and V(minus) route the switch-control signal to the Bctrl behavioral element. (A b element in IsSpice4 becomes a "value" E source in PSpice.) When the switch is open (Bctrl delivers logic 0), the reference node (node ref) becomes armed at the highest toggling point (7V in Figure 2's example). When the input voltage increases, it crosses the ref level, and Bctrl switches high. Switch S1 closes and authorizes the current to flow in its terminals through RON. At this time, the Bref source has detected that S1 is closed and now modifies its reference node to the second level (3V in the example). When the input voltage drops, it crosses the 7V level, but no action takes place, because ref has changed to 3V. When the input voltage finally crosses 3V, S1 opens and applies ROFF between its terminals. Figure 3 shows the PSpice simulation results, confirming the 4V hysteresis. Figure 4 shows how to build a simple RC test oscillator, using the PSpice-derived hysteresis.
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