Compiler adds RTL-performance prototyping
By Gabe Moretti -- EDN, September 5, 2002
The Synopsys RPP (RTL-performance-prototyping) flow uses the company's Physical Compiler, which targets IP (intellectual-property) vendors and integrators. The RPP flow allows IP providers to rapidly explore physical-design alternatives early in the design cycle, enabling them to choose an implementation that has the best chance of meeting their target design goals. Due to increasing time-to-market pressures and greater demand for design reuse, IP providers must provide predictable quality of results across the hardening of their cores at the customer site.
Traditionally, designers have had to wait until a final floorplan emerged before they could validate the physical-implementation feasibility of their RTL design. Now, designers can use Physical Compiler before a floorplan is available to find an implementation that enables predictable timing convergence and routability. Synopsys will release RPP with Physical Compiler Version 2002.05, and it is available to all Physical Compiler customers.
Synopsys, 1-650-584-5000, www.synopsys.com.
