PC-board layout eases high-speed transmission
Edited by Bill Travis
Gregory Adams, Moorestown Microwave Co, Moorestown, NJ -- EDN, November 8, 2001
As digital techniques move to higher speeds, designers become aware of the need to treat pc-board traces as RF transmission lines. In these lines, you strive to hold the line impedance, Z0, to a constant value—typically, 50Ω—and to terminate the line with the same impedance. Data families such as ECL, PECL, and LVDS send data over a pair of traces known as a balanced transmission line. One line switches high, while the other switches low. As with other high-speed logic families, you must hold the transmission-line impedance constant and properly terminate the line. If the spacing between the pair of traces is large, then you can design the traces as simply two 50Ω transmission lines. On the other hand, if the spacing between the traces is less than several times the board thickness, then the effect of one trace on the other changes the characteristic impedance of the line.
In RF parlance, when equal voltages drive the two lines, the resulting impedance of each individual line to ground is called Z0 Even, or Z0e. When equal and opposite voltages, as with differential signaling, drive the two lines, the impedance of one line to ground is called Z0 Odd, or Z0o. You need to concern yourself only with Z0o, because it applies the to the impedance of a differential-data transmission line. The Z0o of a differential pair is always lower than the Z0 value of a single trace having the same width on the same board. To hold the impedance of a transmission line to some required value, you must make the traces narrower than would be the case with a single trace. Generally, this fact is good news for digital designers who need to make those transmission lines fit between the vias under a dense BGA chip.
If the traces are on the top of a board with a ground plane under them, then you can model them as coupled "microstrip" lines (Figure 1). On the other hand, if the traces are in a layer with ground planes above and below them, then you can model them as coupled "striplines" (Figure 2). In the stripline case, you assume that the pair of transmission lines is sandwiched between the two ground planes and that the board thicknesses to the top and ground planes are equal. Table 1 and Table 2 show the line width required to hold Z0o constant at 50Ω for various values of the gap between the two traces. Table 1 applies to the microstrip case with lines on top of the board; Table 2 applies to the stripline case with lines sandwiched between equally spaced ground planes. Note that the trace widths are much smaller in the stripline case because of the second ground plane. Both tables assume a board thickness of 0.01 in. You can directly scale the line widths and gaps for other dielectric thicknesses. In every case, the dielectric material is FR-4 with a dielectric constant of 4.6. The tables use the old DOS version of HP's Appcad, a program HP distributes as freeware. The newer versions of this program do not handle coupled lines. To calculate the impedance, Z0 Odd, of differential transmission lines of other dimensions, you can download a copy of Appcad from www.geocities.com/gregsdownloadpage.
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