Simple circuit produces a less-than-25-nsec pulse
Andy Brandenberger, National Instruments, Austin, TX -- EDN, May 11, 2000
In many testing situations, a circuit that can produce a short pulse is useful. You can use a short pulse to test trigger or interrupt-pulse-width requirements and to mimic glitches or noise on inputs, for example. In some cases, short pulses with long delays between them are desirable. For these cases, a function generator is inadequate because you can reduce the duty cycle low enough to produce low-nanosecond pulse widths only at relatively high frequencies. Although purely analog circuits can generate short pulses, input and output loading and buffering propagation delays create problems with interfacing them to TTL-compatible circuitry.
The circuit in Figure 1 uses two one-shot timers and a D flip-flop to create a short, TTL-compatible positive pulse when triggered with a TTL-compatible positive edge. Because the circuit is positive-edge-triggered, the only requirement for the duty cycle of the triggering device is that it meets the minimum input pulse width for the one-shot timers, which is 40 nsec for the 74LS123, IC1.
IC1B provides a fixed pulse width of approximately 150 nsec. Via R1, IC1A provides a variable pulse width of 150 to 1000 nsec. A positive pulse at Input A triggers each timer. This trigger inactivates IC2A's CLR input and makes its CK signal low. When IC1B times out, its positive-going edge clocks the logic 1 on the D input of IC2A to Output B. When IC1A times out, it's output clears the Q output of IC2A, taking Output B low. Thus, you can express the pulse width at Output B as follows: Pulse width of IC2A=pulse width of IC1A-pulse width of IC1B.
The output pulse width for this circuit is variable from approximately 5 to 850 nsec. You can produce a shorter pulse width by using faster logic. The circuit also allows for easy modification should negative trigger inputs, output pulses, or both be necessary. (DI #2528)
