Pentium II power supplies: too young to smoke
Most dc/dc power supplies for high-speed µPs don't meet the CPU manufacturer's specs, and some fail at a tender age. If you recognize the problems and understand dc/dc-converter design, your supply can live long-and you can prosper.
A Gentchev, Z Zansky, and P Collanton, Analog Devices Inc -- EDN, January 21, 1999
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The latest generation of microprocessors demands voltage regulators that maintain constant outputs despite sudden changes in load current. The new µPs also require tightly controlled supply voltage, which is achievable only with intelligent voltage programming. Intel’s (www.intel.com) latest CPU-voltage-regulator specifications, VRM8.2 and VRM8.3, call for strict static and dynamic voltage regulation with fast load-current-change rates of 20 to 30A/µsec. The voltage-regulator-module (VRM) specification requires the voltage regulator to hold the µP core’s supply voltage within narrow limits when the processor’s current demands change at rates as fast as 30A/µsec. Without a careful design approach and extensive knowledge of advanced power-supply design, few of the available voltage-regulator ICs meet these specifications. Designs that are optimized only for price perform inadequately, and they fail prematurely. The main causes of poor reliability are poor design and the improper selection of components for the application, such as electrolytic capacitors, power transistors, and even inductors and resistors. A good design satisfies all or most of the parameters of the VRM specification and guarantees a long-lived power supply. The flexible architecture of the ADP3152 acts as the basis for a low-gain optimal-response power-supply system and another system with somewhat higher loop gain. One circuit fully complies with the Intel specifications. The other circuit, which is less expensive, complies in all respects except for transient-settling time. In the minds of most power-supply engineers, Intel has never satisfactorily explained the need for the specified transient performance. What the Intel specs tell us Table 1 shows the main voltage and current specifications for the 2.8V Pentium II Processor. Pay special attention to the slew rate of the core-supply current, ICC, and the tight static tolerances of the core supply-voltage, VCC, measured at the processor pins. The CPU supply current can easily jump from a negligible value to almost 14.2A with a slew rate as high as 30A/µsec. During this transient, the output voltage must stay within the core’s static VCC tolerances of –60 to +100 mV if the load transient recovery exceeds 2 µsec. If the transient-recovery time is less than 2 µsec, the specification relaxes the converter-output-voltage tolerance to –130 to +130 mV (for the 300-MHz processor). The time allowed for the transient voltage to enter the core’s VCC transient-tolerance window is extremely short. In common designs with common topologies, there is only one way to achieve this fast transient response: You must increase the converter frequency. Moreover, physical laws say that transient recovery takes not less than seven to 10 switching cycles. Therefore, for the converter to respond fast enough, it must operate at a switching frequency of almost 5 MHz and must have a very well-behaved transient response. The state of the art in cost-sensitive, high-volume voltage regulators limits switching frequencies to 1 MHz. Typical 150 to 200W ac-to-dc power supplies that powered older 486 and Pentium-processor-based PCs provided outputs of 5 or 3.3V. These supplies’ typical static and dynamic voltage windows were ±5%. The load-transient slew rate was 0.5 to 1A/µsec. Older supplies met those requirements with relative ease. The new Intel VRM8.2 and 8.3 specs are a lot more demanding. For example, the static voltage regulation on the several outputs is specified as +2.1 to –3.5% and ±3%. An output voltage that exceeds these limits during a transient load change must remain within the transient limits of ±4.6 and ±5% and must recover in less than 2 µsec. As mentioned, common topologies cannot achieve this fast transient recovery. As a result, most power-supply designs follow only the static regulation limit for both static and dynamic responses, or, as usually happens, they disregard the 2-µsec time limit for an output-voltage transient excursion. Thus, these designs do not fully meet the VRM specifications. However, the VRM specifications appear to be excessively conservative (Reference 1). Because Intel does not explain the tight transient limits, most motherboard dc/dc-supply designers overlook them. The designers reason that it is acceptable to meet the static-regulation requirements and to take advantage of a wider transient window. Most CPU-power-supply regulators achieve 20- to 30-µsec transient-recovery time rather than the 2 µsec for which the Intel specifications call. Such designs can use smaller, less expensive, lower valued output-filter capacitors. These capacitors exhibit higher equivalent series resistance (ESR) than the capacitors that fully compliant designs need (references 2, 3, and 4). Tolerances count IC-regulator data sheets and application notes do not make clear how to mathematically combine the relevant component tolerances to achieve the specified performance. In the following sections, you will learn how to determine the total static and transient regulation. Remember that the VRM voltage-regulation window is specified at the CPU’s VCC pins and not at the power-supply output terminals. The pc-board trace resistance between the voltage regulator and the CPU can range from 0.5 mOhm to several milliohms depending on the board layout. At 14A, each milliohm causes a 14-mV drop. At a supply voltage of 2.8V, this drop uses 0.5% of the supply’s allowable output-voltage tolerance. Many regulator designs fail to account for these tolerances. References 2 through 5 describe difficulties in meeting the Intel specs. You can use these practical design and test data and considerations as guidelines for designing CPU dc/dc power supplies. Figure 1a shows a design that fully complies with the VRM 8.2 spec. The total output capacitance is 16.2 µF with an ESR of 5.7 mOhm. The total input capacitance is 8.1 µF. Figures 1b and 1c, respectively, show the turn-on and -off load-step responses for the circuit of Figure 1a. Figure 2a shows a mostly compliant design. This design meets the VRM 8.2 spec except that the transient recovery is less than 30 µsec. The VRM specification requires a transient recovery of less than 2 µsec. The total output capacitance is only 3.3 µF with an ESR of 8.6 mOhm. The total input capacitance is 1.7 µF. Figures 2b and c respectively, show the turn-on and -off load-step responses for the circuit of Figure 2a. Transient regulation To accurately measure the static and dynamic regulation compliance of the design shown in Figure 1a, use the following procedure: In general, the load transients can be of either polarity, and the nominal output setting should be in the center of the ± transient-excursion window. However, connecting resistors R1 and R2 from the output of the transconductance error amplifier to ground and VCC reduces the dc gain in these designs. Thus, the supply develops its nominal output voltage when it delivers approximately half of its maximum output load current and at the center of the ± transient-excursion window. The output voltage varies with the load current but stays within the allowed steady-state window. Setting the nominal outputs in this way reduces the measured ± transient-voltage excursion by about half and enables the design to meet the transient-dynamics specification. In the application circuit that we tested, we found that the compensation scheme shown in Figure 1a gave the optimal response. The circuit met the Pentium II dc/dc-converter static and transient specifications with adequate margins, even after allowing for the ADP3152’s initial ±1% error tolerance, the pc-board’s trace resistance, and the external-component parasitics. If you increase the load resistance to the COMP pin, the static regulation improves. However, the load-transient response deteriorates. In Figure 1a, if you decrease the ratio of R2 to R1, the regulation band moves in a positive direction in relation to 2.8V. If you increase R2, the regulation band moves in a negative direction. To obtain the best static and dynamic regulation, you may have to adjust these resistor values depending on the output-capacitor ESR and the pc-board’s parasitic trace resistance. An oscilloscope at the evaluation board’s output terminal measures the output-voltage transient. To avoid errors from the common-mode current flowing through the ground-return resistance of the typical 10-to-1 oscilloscope probe, perform this test with a low-resistance ground return (less than 30 mOhm, or less than 3 ft of 50Ohm coaxial cable). Terminate the oscilloscope side of the coax with a 50Ohm coaxial shunt. Connect the test side of the coax’s center conductor to the evaluation board’s output terminal with a 50Ohm ±1% resistor in series with a 10- to 100-µF capacitor (preferably, MLC-type) that exhibits low ESR and equivalent series inductance (ESL). Use the scope’s ac-measurement option and multiply the scope’s vertical sensitivity by two. Use a scope bandwidth of 100 MHz for this measurement. Static-regulation compliance 1. You must use a high-quality digital voltmeter (DVM) to measure the output-terminal voltage at maximum, minimum, and zero loads. The following measurements are from the circuit in Figure 1a: VO at 14A=2.798V; VO at 1A=2.863V; VO at 0A=2.872V. 2. The above results include the tolerance of the IC’s reference and all of the tolerances of the other parts of the dc loop. Because these other tolerances are within the dc-feedback loop, their effect is negligible. To determine the portion of the output offset that is attributable to the tolerance of the reference on the board under test, we removed the resistors that load the output of the IC’s transconductance error amplifier (R1 and R2 in Figure 1a). Removing these resistors enables full loop gain. With no load at the converter output and with an ideal reference, the converter output should be exactly 2.800V. The difference between the measured voltage and 2.800V is the reference error on this board. On the test board, we measured 2.806V. Thus, the offset is 2.806–2.8=+6 mV. 3. Subtract the above offset from the test results in item 1: VO at 14A=2.798V–6 mV=2.792V; VO at 1A=2.863V–6 mV=2.857V; VO at 0A=2.872V–6 mV=2.866V. 4. Subtract half of the peak-to-peak output ripple at full current and add it at low currents. We used an oscilloscope to measure ripple. VO at 14A=2.792V–8 mV=2.784V; VO at 1A=2.857V+5.5 mV=2.8625V; VO at 0A=2.866V+3.3 mV=2.8693V. 5. Add the IC-reference tolerance at 1 and 0A loads, and subtract it at a 14A load. The IC reference tolerance is ±1%, which at VO=2.8V equals ±28 mV: VO at 14A=2.784V –28 mV=2.756V; VO at 1A=2.8625V+28 mV=2.8905V; VO at 0A=2.8693V+28 mV=2.8973V. 6. Calculate the margins between the test results and the specifications. The Intel static regulation window is 2.7400 to 2.900V. Using these values, we computed the margins: VO at 14A=2.756V–2.74V=16 mV; VO at 1A=2.9V–2.8905V=9.5 mV; VO at 0A=2.9V–2.8973V=2.8 mV. 7. Determine the pc-board trace resistance that is allowable between the converter output and the CPU’s VCC-core input. Calculate the allowable trace resistance by using up the full-load static margin. For the design in Figure 1a we obtained: R=VOMARGIN at 14A/IOMAX=16 mV/14A=1.1 mOhm. Dynamic-regulation compliance You must make a similar series of calculations to determine the transient-regulation margins. This time, though, you do not add the output ripple because it appears within the oscilloscope traces. The Intel transient-spec window is 2.670 to 2.930V. Load transients of ADP3152, including ripple and noise and ±1% reference tolerance, are: VOMIN (when load changes from 1A to 14A)=2.757V; VOMAX (when load changes from 14A to 1A)=2.893V. The test results indicate that the circuit meets the adjusted Intel static and transient load-regulation specifications with an 87-mV margin at 14A. The mostly compliant design Intel specifies the following regulation: Static=2.740 to 2.900V; Transient=2.670 to 2.930V. The ADP3152’s static regulation, including ripple and noise, and 1% reference tolerance, is: VO=2.763V, at Io=14A; VO=2.883V, at Io=0A. Static regulation and IC-reference tolerance allow (2.763–2.74V)/14A=1.6 mOhm of pc-board-trace resistance between the output end of the current-sense resistor and the CPU’s VCC pins. For additional margin, the trace resistance should be 1 mOhm or less. Load transients, including ripple and noise, and 1% reference tolerance of the ADP3152 follow. When the load changes from 1A to 14A, VOMIN=2.738V and recovers to static regulation in less than 30 µsec. When the load changes from 14A to 1A, VOMAX=2.928V and recovers to static regulation in less than 20 µsec. The test results indicate that the circuit meets the adjusted Intel static- and transient-load-regulation specification with margin at a recovery time of less than 30 µsec, rather than the Intel-specified 2-µsec recovery time. Motherboard manufacturers meet cost targets by using low-cost, low-ESR electrolytic capacitors. However, if manufacturers excessively reduce capacitor values and sizes, they encounter another problem (Reference 6). Capacitor life is much shorter for capacitors with a lower value and higher ESR. With lower capacitance, higher ESR, or both, the ac-current components that heat the input and output filter capacitors cause the capacitors to dissipate more power. As a capacitor’s dissipation increases, its operating temperature rises. An electrolytic capacitor’s life decreases with increasing temperature. You can calculate the capacitor life using Reference 7. Capacitor life depends on operating temperature, ESR, and ripple current: L=LCX2((TC-TMAX)X0.1). L is the capacitor life in hours. For a capacitor rated at 105°C maximum operating temperature and at 5000 hours life at that temperature, TC=105°C and LC=5000. TMAX is the maximum temperature at which you operate the capacitor whose life you are calculating. Use the formula below for TCAPCASE, which establishes TMAX for the above equation. (These formulas apply to United Chemi-Con (www.chemi-con.com) LXV-series capacitors.) TCAPCASE=80X(AC–0.7)X(PCINC0.5)+TAMB, where AC is the capacitor surface area in inches squared; PCINC=ESRXIAC2; IAC=IOMAX/(2XN), where N is the number of input capacitors connected in parallel, and ESR is the equivalent series resistance of the capacitor at operating temperature and frequency; and TAMB is the ambient temperature. The calculated life of the C1 input-filter capacitors at 50°C ambient temperature for United Chemi-Con LXV series capacitors is as follows: Fully compliant circuit=63,000 hours, or approximately seven years; Mostly compliant circuit=25,000 hours, or approximately three years. In today’s computer market, a variety of inexpensive motherboards is available that has dramatically smaller capacitors with less capacitance than those in the designs above. For some of these inexpensive boards, we calculated the capacitor life to be approximately three months! Thermal-design trade-offs Other unpublished trade-offs that challenge dc/dc-converter-design engineers arise during attempts to reconcile the thermal design with the supply cost. The motherboard manufacturing process calls for as near 100% surface-mounted components as possible, and most motherboard power supplies use SMD-220- or D2-packaged power FETs. The achievable thermal impedance with convection cooling is approximately 36 to 40°C/W (Reference 8). The thermal calculation calls for a thermal impedance of 13°C/W to limit the buck-FET temperature to 105°C at 50°C ambient (Reference 9). Higher junction temperatures reduce the life of the FETs. Using RTHJA=40°C/W, the maximum FET junction temperature under these conditions is: TJMAX=PDFETHSXRTHJA+50°C= 3.72X40+50=199°C, which is much greater than the 150°C maximum allowed. RTHJA is the thermal resistance from junction to air. PDFETHS is the power dissipation of the heat-sink-mounted FETs. Thus, designers must take advantage of the slip-stream air from the CPU fan in the hope of reducing the thermal impedance to approximately 13°C/W. They must also test to confirm the thermal resistance. The thermal problems would worsen if the dc/dc converter were required to survive overcurrent or short-circuit conditions (Reference 1). Under a full short circuit, most dc/dc-control ICs invoke fold-back- current limiting. This feature reduces the duty cycle of the high-side FET when the output voltage drops below the regulated level. The worst case is a partial short circuit that is not severe enough to cause the fold-back-current limiter to operate. The CPU and the electrolytic capacitors never short to a few milliohms, but their failure may cause 20% overcurrent, a value that may not produce current limiting. (The actual limiting threshold depends on component tolerances.) If limiting does not occur, the 14A regulator must supply 16.8A. The FET power dissipation increases by a factor of more than 1.22 because the FET on-resistance increases at high currents. So the FET temperature rise under 20% overload is more than 44% higher than the temperature rise at full load. Most motherboard designs ignore the possibility of such an overcurrent condition. To show what can happen under moderate overloads, Table 2 provides the key component sources for the design of Figure 1a and thermal-test data for 25°C operation using heat-sink-mounted TO-220 devices with convection cooling. Table 3 shows the thermal data for the same circuit but with SMD-220 or D2-packaged FETs and no heat sink. Finally, Table 4 shows thermal data for the mostly compliant design of Figure 2a with a heat sink. Parsimony promotes problems Problems become even worse in circuits that try to save you a few more pennies by implementing the current-sense resistor with a pc-board trace or by using the inductor’s resistance for current sensing and filtering the sense voltage with an RC network whose time constant equals L/RSENSE. With these approaches, you must choose the sensing element’s cold resistance so that the circuit can provide the maximum specified current at the sensing element’s highest temperature. Then, because of manufacturing tolerances and copper’s temperature coefficient (0.4%/°C), the maximum overcurrent can be twice the maximum specified output current. Such currents will surely destroy the FET; they may even cause a fire with toxic fumes that results in possible liability consequences. The latest voltage-regulator-module specifications require CPU power supplies that provide excellent static- and transient-output-voltage regulation. The practical design of these power supplies requires expertise in many engineering disciplines and a thorough and methodical design procedure. You must consider device tolerances, verify static and dynamic performance, calculate input and output capacitor life, and perform a complete thermal analysis using the maximum operating ambient temperature. References
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| Table 1—Main voltage and current specs for the 2.8V Pentium II Processor | ||||||
| Symbol | Parameter | Processor-core frequency (MHz) | Minimum | Typical | Maximum | Unit |
| VCCCORE | VCC for processor core | 2.8 | V | |||
| VCCCORE static tolerance | –0.060 | 0.1 | V | |||
| VCCCORE transient tolerance | 233 | –0.140 | 0.14 | V | ||
| 266 | –0.140 | 0.14 | V | |||
| 300 | –0.130 | 0.13 | V | |||
| ICCCORE | Current for VcCCCORE | 233 | 6.9 | 11.8 | A | |
| 266 | 7.8 | 12.7 | A | |||
| 300 | 8.7 | 14.2 | A | |||
| ICCSGNTCORE | ICC for stop-grant VCCCORE | 233 | 0.8 | 1.1 | A | |
| 266 | 0.9 | 1.2 | A | |||
| 300 | 1 | 1.3 | A | |||
| ICCSLPCORE | ICC for sleep VCCCORE | 0.07 | 0.080 | A | ||
| ICCDSLPCORE | ICC for deep-sleep VCCCORE | 0.020 | A | |||
| dICCCORE/dt | ICC slew rate | 30 | A/µsec | |||
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Table 2—Key components and component temperatures for Figure 1a’s design, Current-sense-resistor option, TO220 FETs on heat sinks |
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| Function | Pieces used | Value | Manufacturer | Type number | Package | Contact | Full-load maximum temperature (in degrees Celsius) at 25°C ambient | Short-circuit or overload maximum temperature (in degrees Celsius) at 25°C ambient |
| Input capacitor | Three or four | 2700 µF/10V | United Chemi-Com | LXV10VB- 272M12X30LL |
Through-hole | 1-847-696-2000 | ||
| Output capacitor | Six | 2700 µF/10V | United Chemi-Com | LXV10VB- 272M12X30LL |
Through-hole | 1-847-696-2000 | ||
| Output-capacitor second source | Six | 2700 µF/10V | Panasonic | FA-series | Through-hole | |||
| Buck inductor | One | 3.3 µH | Coiltronics | CTX12-13855 | Through-hole | 1-561-241-7876 | 90 | |
| Buck-inductor second source | One | 3.3 µH | Frontier Electronics Ltd, Taiwan | 3.3UH14- ATOROID |
Through-hole | Rep: 1-805-522-9998 |
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| Input filter inductor | One | 1.5 µH | Coiltronics | UP3B-1R5 | SMT | 1-561-241-7876 | ||
| Current-sense resistor | Three | 20 mOhm/ 1W/5% (three parallel) |
KRL | SL1 | SMT | 1-603-668-3210 | ||
| Current-sense resistor second source | One | 7 mOhm/ 3W/5% |
IRC | OAR3 | Through-hole | 1-704-264-8865 | ||
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MOSFET Ferrite bead on drain lead of lower FET |
Two | International Rectifier | IRL3103S | SMT | 1-310-322-3331 | 83 | Overload | |
| Fair-Rite Inc | 2843002302 | SMT | 1-914-895-2055 | 83 | Overload | |||
| Heat sink for Q1 | Two | RTH= 12.5°C/W |
Thermalloy Inc | 6030B or D | Through-hole | 1-972-243-4321 | 90 | Overload |
| Heat sink for Q2 | Two | RTH= 20.3°C/W |
Thermalloy Inc | 7141 | Through-hole | 1-972-243-4321 | ||
| LDO-MOSFET | One | International Rectifier,Motorola | IRLR2703 MTD20NO3 |
SMT | 1-972-516-5100 | |||
| Vo2 filter capacitor | One | 1500 µF/6.3V | United Chemi-Com | LXV6.3VB152- M10X25LL |
Through-hole | 1-847-696-2000 | ||
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Table 3—Key components and component temperatures for Figure 1a’s design, Current-sense-resistor option, SMT D2 FETs, no heat sinks |
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| Function | Pieces used | Value | Manufacturer | Type number | Package | Contact | Full-load maximum temperature (in degrees Celsius) at 25°C ambient | Short-circuit or overload maximum temperature (in degrees Celsius) at 25°C ambient |
| Input capacitor | Three or four | 2700 µF/10V |
United Chemi-Com | LXV10VB- 272M12X30LL |
Through-hole | 1-847-696-2000 | ||
| Output capacitor | Six | 2700 µF/10V |
United Chemi-Con | LXV10VB- 272M12X30LL |
Through-hole | 1-847-696-2000 | ||
| Output-capacitor second source | Six | 2700 µF/10V |
Panasonic | FA-series | Through-hole | |||
| Buck inductor | One | 3.3 µH | Coiltronics | CTX12-13855 | Through-hole | 1-561-241-7876 | 90 | |
| Buck-inductor second source | One | 3.3 µH | Frontier Electronics Ltd Taiwan | 3.3UH14- ATOROID |
Through-hole | 1-805-522-9998 | ||
| Input-filter inductor | One | 1.5 µH | Coiltronics | UP3B-1R5 | SMT | 1-561-241-7876 | ||
| Current sense resistor | Three | 20 mOhm/ 1W/5% (three parallel) |
KRL | SL1 | SMT | 1-603-668-3210 | ||
| Current-sense resistor second source | One | 7 mOhm/ 3W/5% |
IRC | OAR3 | Through-hole | 1-704-264-8865 | ||
| MOSFET | Two | International Rectifier | IRL3103S | SMT | 1-310-322-3331 | 83 | Overload | |
| Ferrite bead on drain lead of lower FET | Fair-Rite Inc | 2843002302 | 1-914-895-2055 | |||||
| Heat sink for Q1 | Two | RTH= 12.5°C/W |
Thermalloy Inc | 6030B or D | Through-hole | 1-972-243-4321 | 90 | Overload |
| Heat sink for Q2 | Two | RTH= 20.3°C/W |
Thermalloy Inc | 7141 | Through-hole | 1-972-243-4321 | ||
| LDO-MOSFET | One | International Rectifier, Motorola | IRLR2703 MTD20NO3 SMT |
1-310-322-3331 | ||||
| Vo2 filter capacitor | One | 1500 µF/6.3V | United Chemi-Con | LXV6.3VB152- M10X25LL |
Through-hole | 1-847-696-2000 | ||
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Table 4—Key components and component temperatures for Figure 2a’s design, Current-sense-resistor option, TO220 FETs on heat sink |
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| Function | Pieces used | Value | Manufacturer | Type number | Package | Contact | Full-load maximum temperature (in degrees Celsius) at 25°C ambient | Short-circuit or overload maximum temperature (in degrees Celsius) at 25°C ambient |
| Input capacitor | Three or four | 560 µF/25V |
United Chemi-Con | LXV25VB561 M10X25LL |
Through-hole | 1-847-696-2000 | 55 | 55 |
| Output capacitor | Six | 560 µF/25V |
United Chemi-Con | LXV25VB561- M10X25LL |
Through-hole | 1-847-696-2000 | 60 | 64 |
| Input/output capacitor second source | 560 µF/25V |
Panasonic | FA-series | Through-hole | ||||
| Buck inductor | One | 3.3 µH | Coiltronics | CTX12-13855 | Through-hole | 1-561-241-7876 | 106 | 108 |
| Buck-inductor second source | One | 3.3 µH | Frontier Electronics Ltd, Taiwan | 3.3UH14- ATOROID |
Through-hole | 1-805-522-9998 | ||
| Input filter inductor | One | 1.5 µH | Coiltronics | UP3B-1R5 | SMT | 1-561-241-7876 | 66 | 51 |
| Current sense resistor | Three | 20 mOhm/ 1W/5% |
KRL | SL1 | SMT | 1-603-668-3210 | 135 | 141 |
| Current-sense-resistor second source | One | 7 mOhm/ 3W/5% |
IRC | OAR3 | Through-hole | 1-704-264-8865 | ||
| MOSFET | Two | Fairchild | NDP6030L | Through-hole | 97 | 122 | ||
| MOSFET second source | Two | International Rectifier | IRL3103 | Through-hole | 1-310-322-3331 | |||
| Heatsink for Q1&2 | Two | RTH= 12.5°C/W |
Thermalloy Inc | 6030B or D | Through-hole | 1-972-243-4321 | ||
| Schottky diode | One | International Rectifier | 10BQ040 | SMT | 1-310-322-3331 | 110 | 95 | |
| LDO-MOSFET | One | International Rectifier, Motorola | IRLR2703 MTD20NO3 |
SMT | 1-310-322-3331 | |||
| Vo2 filter capacitor | One | 1500 µF/6.3V | United Chemi-Con | LXV6.3VB- 152M10X25LL |
Through-hole | 1-847-696-2000 | ||
| PWM-IC | One | Analog Devices | ADP3152 or 53 | SMT | 1-781-329-4700 | 48 | 50 | |
| Ferrite bead to Q2 FET | One | Fair-Rite Inc | 2643000101 | 1-914-895-2055 | ||||
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| Authors' biographies Paul Collanton is a design-engineering manager at Analog Devices (Santa Clara, CA). He holds a BS in electrical engineering and computer science from the University of California—Berkeley and an MS in the same fields from the University of Santa Clara (Santa Clara, CA). He is a member of the IEEE and has worked at Analog for 15 years. Besides spending time with his family, he devotes his leisure time to baseball, golf, and ice hockey. Angel Gentchev is a senior applications engineer at Analog Devices (Santa Clara, CA), where he has worked for one year. He holds a PhD in space-power electronics and is a member of the IEEE and the PESC. His hobbies are wind surfing and composing rock and blues music. Zoltan Zansky is a principal applications engineer at Analog Devices (Santa Clara, CA). He holds a degree from the Technical University of Budapest (Budapest, Hungary), and has been at Analog for three years. His hobbies are ocean sailing and celestial navigation. |
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