There’s more to IP design than blocks of code
By Graham Prophet, EDN Europe Editor -- EDN, January 7, 1999
 In the editing business, you have to sit through a lot of presentations, mostly concerning new products or services or plans for future introductions. Most also have a degree of preamble; it’s a bit like a frame of packet-routed data. You get a few bits of identifier, a bit more that gives context and direction, and eventually you get to the payload. It occurred to me to wonder what the most frequently repeated theme of 1998’s presentations had been; in fact, it’s no contest. Over and over again, the cited issue is the complexity challenge of system-on-chip design. The same theme turns up prefacing presentations on ASIC processes, FPGA devices, simulators, hardware/software-coverification tools, layout tools—all the paraphernalia of today’s silicon and EDA tools, in fact. The common thread is that deep-submicron silicon has given us the ability to put multiple millions of transistors on a die: How are we going to make use of them effectively in a realistic time frame? One of the answers to that question has been the appearance of intellectual-property (IP)-based design and design reuse. As with many innovations in EDA, there’s little fundamentally new in the concept. We have long had design reuse; when we find things that work, we retain them and use them again. The grander titles of design reuse are (in part, at least) concerned with automating the process, now that typical complexity of the "things that work" is too great to keep in an engineer’s head and to pass between us by word of mouth and lab notebook. And the investment in making those functions work is so great that we need to capitalise on it when we have made that investment and to exploit it when someone else has and is willing to trade the results of that investment. Enter IP-based design. To listen to some of the early presentations on the subject, a new approach was opening up that had few impediments in its path; we would be able to select major functions from different vendors, precharacterised and preverified, and slot them together on an ASIC design, just as we did in a previous generation with MSI logic. Of course, it hasn’t quite been that simple. You can argue whether the presentations of a couple of years ago oversold the initial capability, but the inherent conflicts in having VLSI functions that were guaranteed always to work—while being sufficiently flexible and "tunable" to match each new application and while protecting the value invested in these functions’ source code—have made for slower acceptance than you might have expected from the first round of hype. The founders of the Virtual Socket Interface Alliance (VSIA) created it to try to introduce open technical standards to this emergent market, and the alliance has been working on the problems. Not by any means the least of these problems are the commercial issues of contract detail, royalty payments, product liability, and so on. Now, there is a new set of initials in the game: VCX (Virtual Component Exchange) (www.vcx.co.uk). Based around Scotland’s Alba Centre (www.albacentre.co.uk)—a sort of system-on-silicon science-park campus—VCX aims to provide just that mechanism for trading semiconductor IP in a structured environment. It plans to focus on those business and legal issues, aiming to smooth that part of the process, so that the technical development of the IP market can go on unimpeded. Services will include matching customers to providers, handling contract details, and auditing the use of the IP. A steering group of IP creators, including EDA vendors, semiconductor suppliers, and some companies that combine those roles, guides VCX. As such, it ought to have the right perspectives to develop in a balanced way that will serve all concerned. With the great diversity of design activity that exists across Europe, there’s a correspondingly rich base of existing IP. If the "free-trade-IP" model for design of next-generation complex silicon is to work, there’s every reason for an initiative with European roots to be at the forefront. Following a year that can hardly be described as one of the semiconductor industry’s most glorious, the VCX project looks like one to watch for 1999. |
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 Graham Prophet, EDN Europe EditorYou can reach EDN Europe Editor Graham Prophet at graham.prophet@rbi.co.uk. |
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