EUV lithography cannot come soon enough
Sematech's biennial Litho Forum survey shows that cost of ownership is a leading concern as respondents anticipate their critical-layer lithography needs. Collaboration is key for bringing in viable solutions.
By Aaron Hand, Contributing editor -- EDN, June 22, 2010
As is customary at the end of its biennial Litho Forum, Sematech surveyed its conference attendees last month about the state and future of lithography development. Although in past years the semiconductor industry has seen more debate about which lithography technique was likely to come out on top, EUV lithography is now considered by most a foregone conclusion. The question now is whether the remaining hurdles will be overcome quickly enough.When chipmakers were asked which technology they'd prefer to be using for critical-layer lithography in 2012 if it were available, EUV was the most desired technology, with 41.3% (33.3% chose double patterning). But asked which technology they would actually have to use for critical layers in 2012, only 5.6% answered EUV, with responses falling heavily into double patterning instead, with 77.8%.
ASML will begin shipping the first of six orders this year for its NXE:3100 pre-production EUV tool, and plans to ship its first NXE:3300B high-volume tool in the second quarter of 2012, but the scale of availability is not likely to allow EUV to be used to a great extent by 2012. Nikon doesn't plan to introduce its high-volume EUV scanner until 2014 or 2015.
"Some will certainly look toward doing some critical layers," commented Stefan Wurm, associate director of lithography at Sematech. "You're not going to do a lot of things, but if you can do one or two critical layers, they will try to do that."
There is still a lot of technical work that needs to be done for EUV, noted Bryan Rice, director if lithography at Sematech. "And a company that's got to bank tens of billions of revenue on a technology decision probably has to be cautious in its decision making as opposed to aggressive because there's just too much to risk," he said. "And so the answer is that 41% of the people would like to use it, but 77% of the people think they're going to have to go with their backup plan."
The backup plan is double patterning, which is seen primarily as a bridge from standard 193-nm immersion lithography to EUV. Double patterning offers a good shrink, but its costs are too high, and it imposes design restrictions, contended Rard de Leeuw, ASML's product marketing director. Although with double patterning, litho costs could increase 2x to3x, he said at the Litho Forum, EUV operating at a throughput of >100 wph could bring costs back in line with single-patterning trends, and 180 wph would bring costs even lower.
But increased throughput requires higher-power EUV sources, and source suppliers are not quite there yet. ASML's NXE platform will use a laser-produced plasma (LPP) source from Cymer. The pilot source is able to support 15 wph, but the upgrade toward 60 wph has been defined. ASML's roadmap slates throughput at 125 wph for the NXE:3300B, and 150 wph for the NXE:3300C, due out in 2013.
The industry is counting on continued EUV improvements as double patterning begins to run out of steam. Double patterning is expected to lead the way in 2012, when the leading edge will be at 22-nm half-pitch - 60.4% of survey respondents expect to use double patterning for gate layers and 51.1% for contact layers. But by 2014-2015, with many respondents at 16 nm, EUV takes over as the leader with 43.8% for gate manufacturing and 47.7% for contacts. In the 2016-2018 timeframe, with more of the industry firmly in the 11-nm regime, EUV and extended EUV are expected to account for 60.6% of gate layers and 63.9% of contact layers.
At this point, however, EUV throughput remains a concern for much of the industry, according to Obert Wood, principal member of the technical staff in the Strategic Lithography Technology Department at GlobalFoundries, and leader of the IBM Alliance's EUV program. If source power cannot reach the goals set for it, cost of ownership (CoO) becomes a problem for EUV technology.
Most CoO models predict that the cost per layer for EUV will be approximately 1.5× higher than conventional 193-nm immersion lithography, but only one-half to one-third that of double patterning, Wood said. But those models rely heavily on EUV exposure tool throughput. EUV mask blank costs are also relatively unknown at this point, because defect-free blanks are not yet available. Costs for defect mitigation and AIMS review would have to be included in the overall cost of reticles.
The mask inspection infrastructure has been much talked about over the past year and a half, with concern over the lack of funding. Sematech vowed last year to take responsibility, and announced early this year the EUVL Mask Infrastructure (EMI) Partnership, a consortium formed to help fund defect-free EUV mask development. There are seven companies signed up for EMI so far, Rice said, and projects are geared toward AIMS/defect review, substrate and blank inspection, and patterned mask inspection.
"Our first tool development contract is in contract negotiation, and we're hoping to have that first tool program up and running soon," he said, adding that the second and third tool programs are in various stages of development.
E-beam lithography's role
Like EUV, more people who responded in the Litho Forum survey are interested in using e-beam direct-write (EBDW) lithography for critical layers in 2012 than think they'll actually be able to, but on a much smaller scale - 10.7% vs 2.8%. When asked in separate questions which lithography technology the respondent would employ or support for gate and contact layers in 2012, and again in 2014-2015, and 2016-2018, direct write fell in the single digit percentage points each time.
Despite a consortium started about two years ago - the eBeam Initiative, with about 30 members and advisors spanning the semiconductor supply chain - EBDW, also known as maskless lithography (ML2), has not garnered the kind of support needed to overcome its technical challenges.
"The biggest problem with direct write is that it has a lot of basic infrastructure problems which need to be overcome, and not a large support structure like EUV has," Rice said, pointing to the billions of dollars that have been spent to solve EUV's infrastructure gaps and technical challenges. "Direct write simply does not have that broad support. As a result, it hasn't made the kind of progress that EUV has."
The technical hurdles typically noted with regard to e-beam lithography include its slow throughput, and concerns about stitching and overlay. But there are other problems as well, Rice said.
"The strength of direct write is its resolution, but if you ask the technical experts, they'll tell you that that's actually its biggest weakness, because in fact, if you try to use direct write as a high-resolution, critical layer lithography technology, then you run up against beam blur from the electrons, which is in fact its biggest limiter of resolution, and that beam blur is quite significant. So if you were trying to use direct write at, say, the 11-nm node, the beam blur would be on the size of the feature that you're trying to resolve."
However, the mutlibeam technology that several toolmakers are working on for ML2 is being increasingly supported as a means to reducing mask write times. With increasing feature density and complexity, mask data is growing faster than the capability to write the data in a reasonable amount of time, noted Lloyd Litt, alternative lithography program manager for Sematech. In his summary of the Maskless Lithography and Multibeam Mask Writer Workshop, which was held the Monday before Litho Forum began, Litt noted significant support for development of a high-speed mask writer.
Ultimately, the kind of support most favored is a consortium-driven multibeam maskwriter development program akin to Sematech's EMI. "I think it's a great opportunity for the industry to collaborate pre-competitively," Rice said. "It sounds like there's pretty broad support for it, at least for continued information gathering."
Over the next six months, Sematech will likely try to lead the formation of such a funding partnership, he added.
Talkback
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Up to now not much mention of defects. Presumably, it's because they can't detect EUV defects yet. The cost of dealing with all these sub-15 nm defects is unimaginable.
imagine - 2010-11-7 23:46:36 PDT -
The title is best summary.
todd - 2010-11-7 06:43:21 PDT -
I can't see EUV sources being anything but high risk, low availability, single-application items. Possibly worse than synchrotrons even. Compared to electron beams used almost everywhere, or even 193 nm used for Lasik as well as lithography.
reader - 2010-9-7 10:15:15 PDT -
It's pretty funny to refer to Bryan Rice as an EUV person, considering all the years he spent speaking and acting out against EUV.
Consider - 2010-4-7 10:07:29 PDT -
EUV people pointing out ebeam blur negatively impacting resolution are just dwelling in glass houses, as the photoelectrons and secondary electrons from EUV do the exact same thing.
guest - 2010-22-6 08:15:52 PDT


















