IP block makes audio-bandwidth 12-bit ADC from digital logic

Paul Rako, Technical Editor -- EDN, July 15, 2010

Targeting applications in FPGAs and ASICs, Stellamar has created an IP (intellectual-property) block that uses digital circuitry to make a high-quality ADC. The scheme uses an LVDS (low-voltage- differential-signaling) input as a comparator. By adding a few passive components to the block, you can achieve 12-bit accuracy over a bandwidth of 15 kHz. At 15- and 4-kHz bandwidths, SNRs (signal-to-noise ratios) are 68 and 72 dB, respectively. The design exhibits no missing codes.

One pin of the LVDS pair serves as a single-ended analog input, and the other is a feedback pin for the IP block. You can use two of these blocks for a differential input. The analog-input range can sweep through the entire common-mode range of the I/O circuitry, or you can design it to run over a narrower range of voltages with a common-mode voltage that you specify. The design also works in military applications; you can build it in radiation-hardened CMOS or SOI (silicon-on-insulator). The company will sell the IP block for a fixed NRE (nonrecurring-engineering) fee, plus a per-unit royalty. Stellamar demonstrates the design’s operation in many FPGAs.

Stellamar