Test 18-bit ADCs with an ultrapure sine-wave oscillator

With careful design, this circuit challenges test equipment's ability to verify its performance.

Jim Williams and Guy Hoover, Linear Technology -- EDN, August 11, 2011

Oscillator circuitry


Start with a design based on the work of Winfield Hill, director of the electronics-engineering laboratory at the Rowland Institute at Harvard University. You can then adapt this design for a 2-kHz Wien-bridge design (Figure 2). Using all of the amplifiers in inverting mode eliminates CMRR (common-mode-rejection-ratio) errors from the signal path.

Low-distortion amplifiers A₁ and A₂ are the active components of this oscillator. The JFET of the original design would introduce conductivity-modulation errors, so you can replace it with an LED-driven CdS (cadmium-sulfide) photocell isolator. You then combine the output of A₂ with a filtered dc offset at the input to A₃. The capacitor in A₃’s feedback network limits the bandwidth of the amplifier. The output of this 2.6- kHz filter drives the input amplifier of the ADC under test.

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The A₁/A₂ oscillator needs AGC (automatic gain control), so you ac-couple the circuit’s output to a high-impedance, low-noise JFET-input amplifier, A₄, which feeds precision rectifier A₅. A₅ in turn drives integrator A₆. A₆’s dc output represents the ac amplitude of the circuit’s output sine wave.


By deriving the gain-control feedback from the circuit’s output, you maintain the output amplitude, despite the attenuating, bandlimiting response of A₃ and the output filter. This topology also places demands on the loop-closure dynamics of amplifier A₇. A₃’s bandlimiting, the output filter, A₆’s lag, and the ripple-reduction components that attach to Q₁’s base combine to generate a significant amount of phase delay. You can accommodate this delay with a 1-μF dominant pole at A₇, along with a zero-value RC (resistor/capacitor), to achieve stable loop compensation. This approach replaces closely tuned high-order output filters with simple RC roll-off responses, minimizing distortion and maintaining constant output amplitude.

It is essential that you eliminate oscillator-related signal components from the LED bias to maintain low distortion. Any such residue modulates the oscillator’s amplitude, introducing impure frequency components. The bandlimited AGC signal path is well-filtered.


Oscillator distortion


The Hewlett-Packard HP-339A analyzer specifies a minimum measurable distortion of 18 ppm. The figure shows the instrument indicating 9 ppm, which is beyond the unit’s specification and, hence, highly suspicious. Measuring distortion at or near the limits of your equipment yields pronounced uncertainties. Distortion measurements at or near equipment limits are full of unpleasant surprises (Reference 1).


ADC testing

When you test ADCs, you route the oscillator’s output to the ADC through its input amplifier. The test measures distortion products produced by a combination of the ADC and the ADC’s input amplifier. You then examine the ADC’s output with a computer, which quantitatively indicates spectral-error components (Figure 6).

You can download the code to take measurements and obtain input-amplifier, ADC, computer-data-acquisition, and clock boards from the Linear Technology Web site. Appropriate parts include an oscillator; the Linear Technology LT6350 amplifier; the LTC1279 ADC; the DC718 interface card; and any stable, low-phase-noise, 3.3V clock capable of driving 50Ω.

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Reference

Williams, Jim, “Bridge Circuits: Marrying Gain and Balance,” Application Note 43, Linear Technology, June 1990.

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