A diode ladder multiplies voltage under software control
An eight-pin micro multiplies, monitors, and delivers a boosted voltage to a load.
William Grill, Riverhead Systems, Greeley, CO; Edited by Paul Rako and Fran Granville -- EDN, December 1, 2011
The circuit in this Design Idea uses a Microchip 12F10 controller to drive a voltage multiplier ladder and a single pin to output status and to input a trigger signal you supply (Figure 1). When you trigger the signal, the software turns on a MOSFET to connect the multiplier output to a load. The microcontroller has an internal comparator with a 0.6V trip point. The circuit attenuates and feeds back the output voltage to this comparator.
Listing 1 shows the
controller-based software, which stops
the oscillator, driving the voltage multiplier
when the internal comparator
indicates that the output voltage has
reached an upper limit. This circuit
works in a wireless-monitor design,
increasing the voltage, power, and range
of a small periodic transmitter. It can
provide 12 to 15V and 9 to 11 mA.
Processing begins when power is
applied. The controller qualifies its Port
3 input on Pin 4. When at a logic high,
logic is true, and the software code generates
complementary PWM outputs on
ports 4 and 5, which are pins 3 and 4,
respectively.These oscillations charge the ladder network. The controller outputs a low on the Port 2/Pin 5 status line, indicating that charging is under way. You choose the ratio of R1 and R2 so that the center node of the ladder is at 0.6V when the output voltage reaches the desired value. When the output reaches the final value, the controller puts the status pin in tristate mode, and the 20-kΩ resistor pulls the pin up to the power-rail voltage. Port 2 on Pin 5 then becomes an input.
When you pull this pin low, the microcontroller asserts Port 1 and Pin 6 high, turning on the P-channel MOSFET through Q2, and applies the output voltage on C4 to the load. Meanwhile, Port 1 and Pin 6 go high, shifting the lower pin of output capacitor C4 from ground to the power rail and adding a few volts to the output of the voltage ladder.
The program drives
the complementary
outputs at pins 2 and 3
with a 700-μsec PWM
period with a 50% duty
cycle. You can change
the software code to
vary these parameters.
The controller has an
internal 4-MHz oscillator
and supports a user-settable
reference block.
The code continues to
monitor the enable pin,
C4’s voltage feedback,
and the pump operation
during the discharge to
the load. You must set
certain bits in the processor
configuration
for this code to work
(Figure 2).Talkback
-
1.To provide 12V or 15V with 9 or 12mA current needs that microcontroller I/O pins support 5X higher current at 3.3V. Probably it could be much higher due huge voltage drop at used 1N4148 diodes.
2. I/O pins for used microcontroller are rated for 25mA only. So they will be overstressed.
3. The huge capacitor values also sound ridiculous.
Looks like buffers for driving I/O must be mandatory.
Vladimir Doubovis - 2012-27-1 11:02:24 PST -
Good grief, no yule logs burning here, lol. It's an 'idea for design'. Build it, test it, fix it. Nice idea, thanks.
Mr. Happy - 2011-16-12 07:51:50 PST -
there has to be errors in the schematic.
the 330uF capacitor is connected to the pin of the micro that enables the output. - - - changing this pin to a high will cause the output to increase by the micro supply voltage. - -- - - bad
also what happens if the load has a transient on it.
the whole current surge from the transient will have to be handled by the micro pin. Most likely some damage.
the 330uF should be connected to ground! yep some bad editing was done.
Jim P
James R. Pottebaum - 2011-9-12 10:31:54 PST -
Paul & Fran,
The byline claims you folks edited this article. WHAT did you edit? Take a close look at the text vs. the schematic. There are numerous errors in reference. I would certainly expect that technical people would be able to scrutinize this more accurately.
This seems to be a common occurrence nowadays. I see gross grammatical errors practically every day, very surprising given the advanced state of modern word processing software!
OLD_CURMUDGEON - 2011-7-12 04:56:15 PST -
Also useful with the with the polarity reversed, to generate a negative voltage rail.
At low voltages the C**kroft-Walton multiplier configuration is potentially less efficient than the parallel voltage multiplier, which requires fewer diodes (and smaller capacitors) to achieve the same multiplication, so loses less in diode forward voltage drop. (I think this was described in : Ian Hickman, EDN 6 Jun 1991, "Multiplier lowers impedance".)
Also, if the micro has spare port pins, each capacitor of the parallel multiplier can be driven from a separate pin, to reduce the load on the output transistors, alternate pins being driven high and low, synchronously. Personally I would always prefer to drive the multiplier through a buffer, to protect the micro from the high current surges and possible voltage spikes above Vdd or below Vss, especially at startup, when they could cause data errors.
(Sorry Sir John, your name alarms the propriety checker!)
John Jolley - 2011-5-12 10:55:03 PST
