TSMC returns fire over 28-nm process issues
Peter Clarke, EE Times -- EDN, January 26, 2012
LONDON—Foundry Taiwan Semiconductor Manufacturing Co Ltd has hit back at analysts who have said it has yield problems with its 28-nm CMOS manufacturing processes.
Maria Marced, president of TSMC Europe, repeated what has been said before by herself and other TSMC executives; that defect density reduction is on track for the 28-nm node and ahead of where TSMC was with 40/45-nm process technology at an equivalent stage in its roll out.
Marced did acknowledge that each process node roll out has problems but said TSMC engineers rise to the challenges. "Everything is getting more difficult. We have learned the lessons on 40-nm. We have put engineering teams on every tape-out to drive down defect density and drive up yields," she said. "It will be more difficult at 20-nm again, but still we see very good momentum."
Marced emphasized that momentum by saying that TSMC now has 36 ICs in production and 132 tape-outs in the pipeline. "The momentum on 28-nm is three times what it was on 40/45-nm," she said.
Wafer production on 28-nm contributed 2 percent of TSMC's revenues in the fourth quarter of 2011, corresponding to about $70 million in sales, Marced said. It is predicted to go up to 5 percent of TSMC's revenues in the first quarter of 2012 or about $170 million. And for all of 2012 TSMC expects 28-nm wafer production to contribute 10 percent to revenues.
For a process node—that some analysts have said has yield problems—to contribute $70 million going on $170 million worth of business per quarter, is "not bad" said Marced.
This story was originally posted by EE Times.
