Cortex-A7 MPCore processor, ARM

The ARM Cortex-A7 processor provides compelling performance in both single and multicore configurations. Used as a standalone processor, the Cortex-A7 will deliver sub-$100 entry-level smartphones in the 2013-2014 time frame with a level of processing performance equivalent to today’s $500 mainstream smartphones. A single Cortex-A7 processor delivers 5x the energy-efficiency and is one-fifth the size of the Cortex-A8 processor while providing 50% greater performance. The Cortex-A7 makes use of a simple 8-stage in-order pipeline, extended to include dual-issue capability on a range of data-processing and branch instructions. Processor architectural features include support for virtualization and 40-bit physical address space, and AMBA 4 bus interfaces. The processor also enables the introduction of ARM’s big.LITTLE processing, a flexible approach that redefines the traditional power and performance relationship by combining two different, but compatible, processors within the same SoC and allowing the power-management software to seamlessly select the right processor for the right task. Announced in October 2011, the Cortex-A7 has already been licensed by more than eight ARM Partners, including Broadcom, Freescale, Fujitsu, HiSilicon, LGE, Samsung, STEricsson, and Texas Instruments.

Kinetis K50 32-bit microcontrollers, Freescale Semiconductor

The Kinetis K50 family of 32-bit microcontrollers offers multiple connectivity options for continuous monitoring and a measurement engine for reliable processing of analog signals. It is suited for low-power portable medical devices, clinical and lab equipment, test/measurement equipment, instrumentation applications, and monitoring and telehealth applications. The Kinetis K50, which integrates an analog measurement engine, allows for reliable processing of analog signals, providing device designers a single-chip solution. In addition, the Kinetis K50 offers multiple connectivity options to constantly monitor, evaluate, and control system variables. The K50 delivers superior design freedom with scalability within the Kinetis portfolio and easy-to-use software and modular hardware development tools. Key features: ARM Cortex-M4 core with DSP instruction support;  up to 16-channel DMA and crossbar switch; up to 2 x 16-bit ADC with PGA; up to 2 x 12-bit DAC; programmable delay block; operational and transimpedance amplifiers; voltage reference; IEEE 1588 Ethernet MAC with hardware time stamping; hardware encryption coprocessor; USB On-The-Go (Full-Speed) with device charger detect; and flexible, low-power LCD controller with support for up to 320 segments (40 x 8 or 44 x 4).

LPC11U00 microcontrollers, NXP Semiconductors

The LPC11U00 family, based on the ARM Cortex-M0 processor, integrates multiple USB drivers in on-chip ROM, maximizing Flash memory utilization and saving up to 16 KB of code space while providing fully tested and easy-to-use APIs to enable USB integration in a matter of minutes. The on-chip drivers offer several benefits, including seamless Flash programming via USB. The on-chip MSD class driver enables the LPC11U00 to appear on the host side as a regular USB Flash drive. The basic LPC11U1x series provides a compelling replacement for 8-/16-bit USB MCUs, delivering robust USB performance at a sub-dollar price point. To reduce time to market and overall costs, NXP is offering customers the option to sub-license the company’s USB Vendor ID number, eliminating a significant start-up cost for developers. NXP will also offer USB Implementers Forum (USB-IF) certification. In addition to implementation on the successful LPCXpresso platform, NXP has partnered with mbed.org to create a new mbed NXP LPC11U24 MCU board with extended support of its lightweight online compiler and powerful C/C++ MCU SDK to the LPC11U24. Finally, the LPC11U00 family offers on-chip libraries for power profiles and 32-bit divide. The LPC11U00 family is offered in a miniature 4.5 x 4.5 mm TFGBGA48 package suited for small-form-factor mobile and consumer applications.

STM32-F4 microcontrollers, STMicroelectronics

The STM32-F4 series MCUs deliver 168-MHz FCPU, 210 DMIPS, and a 363 Coremark score. The series adds single-cycle DSP instructions, suiting the digital signal controller market, which requires high computational capability and DSP instructions for demanding applications. By providing a simple, full pin-to-pin, and software-compatible upgrade from the STM32-F2 series with more SRAM, higher performance, and a robust collection of peripherals, the F4 series will enable customers designing with the STM32-F2 Series MCUs to offer product extensions by upgrading to the F4 series if they need more memory, performance, or features. Customers currently using a 2-chip MCU and DSP approach can now combine both chips in one high-performance digital signal controller. Key innovations include the 7-layer multi-AHB bus matrix and the integrated ST Adaptive Real Time ART Accelerator, which delivers state-of-the-art performance, with zero-wait-state program execution up to 168 MHz, and best-in-class dynamic power. Technical benefits of the F4 series include ultra-fast data transfers; high integration, with up to 1 Mbyte of on-chip Flash memory, 192 Kbytes of SRAM, reset circuit, internal RCs, PLLs, and sub-1-microAmp real-time clock with sub-second accuracy; extra flexibility to reduce power consumption using 4 Kbytes of backup SRAM; a typical RTC consumption of 1 uA in Vbat mode; and an internal voltage regulator with power scaling capability.

Virtex-7 2000T FPGA, Xilinx

The Virtex-7 2000T FPGA is built using 6.8 billion transistors, providing customers access to an unprecedented 2 million logic cells, equivalent to 20 million ASIC gates, for system integration, ASIC replacement, and ASIC prototyping and emulation. This capacity is made possible by Xilinx’s Stacked Silicon Interconnect (SSI) technology. Customers are using this device to replace large-capacity ASICs to achieve overall comparable total costs in a third of the time, creating integrated systems that increase system bandwidth and reduce power by eliminating I/O interconnect, and accelerating the prototyping and emulation of advanced ASIC systems. The device utilizes over 70% of its resources at a fraction of the power of an equivalent design implemented in multiple FPGAs. As a result, the device provides equipment manufacturers with an integration platform that will help them overcome the challenges of lowering power while increasing performance and capabilities. By eliminating the I/O interfaces between different ICs on a circuit board, a system’s overall power consumption can be reduced considerably. Customers can also lower bill-of-material, test, and development-cycle costs when fewer IC devices are required on a circuit board.

Cast your vote here to honor excellence in engineering.

Click here to view all the 2012 ACE Awards Ultimate Products finalists.