Interface concerns within 10-Gbps fiber-optic modules

Integration conceptually dominates methods of producing more compact fiber-optic modules. Nevertheless, today's 10-Gbps designs comprise several interfaces from one element to another. More integrated functions enable a smaller IC count. Advances in manufacturing result in smaller BGA- solder-bump pitches. Still, other factors and constraints determine a module's characteristics. The separation of functions into optical components, optical-to-electrical components, electrical components, and physical connectors gives rise to fiber-optic-module system-design issues at the interconnection level even during today's era of increased integration. Although designers have encountered these interfaces in previous generations of modules operating at slower bit rates, at 10 Gbps, certain issues become particularly difficult.

Fiber-optic modules comprise a number of basic building blocks with interfaces connecting the blocks to each other and to the electrical and optical environments outside the module (Figure 1). The interfaces fall into five categories. The optical interfaces, shown as items 1 and 11 in the figure, couple light to and from the fiber core.

Items 2, 3, and 10 in the figure show the electrical/optical interfaces, which convert signals between the electrical and optical domains. Integrating a laser with a driver or integrating a pin diode with a transimpedance amplifier would reduce electrical parasitics and simplify the module design. Unfortunately, they demand different attributes of a fabrication process, reducing the cost-effectiveness of an integrated structure. Therefore, module designers need to understand the electrical- and electro-optical-device interfaces.

High-speed electrical interfaces, items 4 and 9, operate at the full core bit rate and bridge functionally disparate blocks. It would be advantageous to integrate laser drivers and transimpedance amplifiers into other functional ICs, just as it would be advantageous to integrate the optical devices. However, just as with the optical devices, it is now more cost-effective to separately process transimpedance amplifiers and laser drivers. With 10-Gbps electrical signals flowing from one IC to another, pc-board designs require care.

The module's system-side electrical connector carries parallel data, power, and control signals. Designers must concern themselves with the parasitics and pin density associated with the connector interface. Finally, designers must also consider the thermal and electromagnetic environment in which the module operates. A design must provide for thermal conduction and radiation and at the same time limit the conduction or radiation of EMI. Modules operating at 10 Gbps introduce challenges for both the thermal and the EMI interfaces.

Previous generations of fiber-optic-module designs successfully couple light from a laser into a fiber core or from a fiber core into a photodetector. However, 10-Gbps-module designs tend to pack everything into less volume; size constraints alone pose additional design challenges in the optical interface. However, as long as the fiber-optic core and cladding materials can accept 10-Gbps optical-modulation patterns without appreciable loss, coupling single devices as shown in Figure 1 may not be the most challenging part of a project.

The industry draws a distinction between different types of 10-Gbps fiber-optic modules. Some telecommunications applications have been using 10 Gbps fiber-optic signaling for years. These modules directly modulate distributed-feedback lasers or use continuous-wave lasers with other forms of modulation.

The cost structures of metropolitan-area networks and LANs do not afford the luxury of using fewer, more expensive lasers. These systems instead benefit from less expensive lasers, such as VCSELs (vertical-cavity surface-emitting lasers). Whereas mature production lines pump out ample quantities of VCSELs for 1-Gbps applications, manufacturers are only now starting to supply lasers that work at 10 Gbps. As a result, some companies that want to compete in today's 10-Gbps-module market are pursuing parallel optical interfaces or WDM (wavelength-division multiplexing). Parallel channels produce an aggregate of 10 Gbps using multiple synchronized streams, each operating at a lower bit rate.

Parallel optical interfaces, such as those used in emerging computer-backplane technologies, must use arrays of subspeed lasers and photodetectors (Figure 2). To increase the fiber and laser density, size becomes a key constraint. Designers of this optical interface must consider how to arrange as many as 12 transmitting and receiving channels to minimize optical cross-coupling, maximize light acceptance, minimize environmental susceptibility, and minimize production yield loss.

Just as with a parallel architecture, WDM needs to incorporate arrays of transmitter and receiver devices (Figure 3). The design challenge that WDM poses is the need to couple multiple light streams to and from one fiber-optic core. This interface requires new lensing systems that must operate in all environmental conditions and still be manufacturable at reasonable costs.

Design for manufacturability often suggests modularity. Being able to test components or subassemblies before final assembly leads to better yield management. Modularity might include the separate packaging and testing of OSAs (optical subassemblies). OSAs are small enclosures that contain optical devices and focusing schemes. In the case of a receiver, they may contain a transimpedance amplifier. The production-line flow can include snapping and soldering the finished OSA into a module. This kind of modularity helps to improve production yields through the manufacturing and testing stages and minimizes scrap costs. A prefabricated TOSA (transmitter OSA) mounts through holes in a pc board by way of bent wire leads (Figure 4).

Although designing for modularity is an attractive goal, you cannot escape fundamental physics. At 10 Gbps, the fast bit transitions generated by, say, a repeating "10" pattern generate a fundamental signal frequency of 5 GHz. Assuming 2 nH for the leads in a TOSA, the series impedance between a laser driver and a laser is 62Ω. If the laser's impedance is close to 50Ω, as you'd typically want for low-reflection ac termination, then the stray inductance reduces the voltage impressed by the driver across the laser by about one-third. The interaction between lead inductance and stray capacitance also causes ringing, which distorts the electrical signal to the laser.

One way to avoid generating significant parasitic reactances at 10 Gbps is to minimize the lead dimensions. Figure 5 shows a redesigned module cross-section that uses a die-attach method to mount the laser die directly to the pc board. The only parasitic inductances are the wire bonds and short connecting board traces. Flip-chip attachment can eliminate the laser's wire-bond inductances, as is shown underneath the 10-Gbps transmitter IC. However, flip-chip and die attachment of the laser lead to increased production costs and risks.

The issue of parasitic reactive elements also arises in the ROSA (receiver OSA). To achieve a high enough bandwidth at the output of the pin into a TIA (transimpedance amplifier), the stray capacitance must be less than about 0.3 pF. Flying wire bonds and long OSA leads make it difficult to achieve this small capacitance. As in the case of lasers, designers of 10-Gbps fiber-optic-module front ends may need to attach the pin directly to the TIA and the TIA to the limiting amplifier or other IC.

As far as chip-to-chip interfaces go, series inductance, stray capacitance, mismatched impedances, proper termination, and pc-board loss factor all play major roles at 10 Gbps. Any extra inductance, such as from poor design of transmission lines or wire bonds, mars the signal quality just as in optical/electrical interfaces. Stray capacitances degrade signal bandwidth. Even a stray as small as 0.5 pF combined with a 50Ω source forms a 25-psec time constant that translates to a 3-dB roll-off at 6.4 GHz. The signals in this electrical-to-electrical interface are predominately "digital"; they have fast edges. With a fundamental frequency of 5 GHz, 10-Gbps digital signals contain harmonics at 15 GHz and higher. A single-pole roll-off at 6.4 GHz might be at a frequency too low to ensure proper signal transmission.

Mismatched impedances that cause improper terminations affect transmission of signals from chip to chip at 10 Gbps. Assuming a pc-board dielectric constant ε of 4, then the wavelength λ at 5 GHz is 3 cm—not much more than an inch. So, any impedance mismatch at either the receiving or the transmitting end can lead to reflections that not only distort the initial rising and falling edges, but also cause degradation in the next bit period. Therefore, module designers must exercise extreme care when laying out interconnections, even for 1-in. traces on a pc board, to avoid excessive intersymbol interference.

Some ICs with 10-Gbps interfaces are wire-bonded directly from an IC to a pc board. Other ICs are wire-bonded from the IC to a BGA substrate. This substrate, which might have a short electrical trace, attaches to pads on the pc board by means of solder bumps. Other ICs mount to a substrate by use of flip-chip-assembly techniques. Here, again, the substrate uses solder bumps and mating pc-board pads. In all of these cases, the interface between the drivers or the receivers inside the IC to the outside world is a key part of the design. Fast, robust IC front-end-driver and -receiver designs are insufficient to ensure module performance at 10 Gbps. Module designs at these speeds demand 3-D packaging models to ensure proper impedance matching and quality signal transmission.

The module design must also take into account pc-board loss. FR-4 material, pervasive in low-cost applications, exhibits significant losses at 5 GHz and beyond. To avoid signal strength and bandwidth roll-off, the pc-board layout must keep traces on a FR-4 substrate as short as possible. Alternatively, module designers can choose other materials that have better high-frequency performance, although they add cost.

Due to the difficulties in routing 10-Gbps signals even short distances, system designers do not send 10-Gbps serial data between fiber-optic modules and network switchboxes. A more feasible system interface uses a collection of subrate parallel signals. The telecommunications industry has adopted this type of parallel interface, which appears in standard 300-pin MSA (multisource-agreement)- compliant modules. The 300-pin MSA became the standard for development of OC-192 transponders—repeater modules that clean up incoming signals and retransmit them to extend a channel's range. A smaller 200-pin MSA now also exists for OC-192 transponders. These MSAs specify the parallel datapath. In particular, the electrical interface follows the Optical Interface Forum's SFI-4 interface proposal, whereby 16 622.08-MHz differential low-voltage differential-signaling signals comprise the OC-192 aggregate of 9.953 Gbps. Similar MSAs specify modules for LAN applications, such as the recent Xenpak MSA module from Agilent, Lucent, and others, which targets point-to-point data-communication networks. This MSA specifies that the connector's parallel electrical interface comply with the XAUI (10-Gigabit attachment-unit-interface) of the emerging IEEE P802.3ae standard. This interface specifies four differential 3.125 Gbps "lanes," which combine to yield 12.5 Gbaud using 8B/10B encoding. An 8B/10B decoder recovers the original 10-Gbps data stream.

These two parallel interfaces help illuminate the issues concerning connectors on 10-Gbps fiber-optic modules. Designers need to exercise the same care when routing 3.125-Gbps signals as they do for 10-Gbps signals to minimize stray reactances. The 622-Mbps signals may not present the same high-frequency challenges. Here, the layout problem is fitting 64 stripline or microstrip signals onto one compact fiber-optic-module substrate.

As designers integrate more features and functions into small volumes, the module's power dissipation becomes an important consideration. Future modules may dissipate as much as 10W in smaller packages than are used today. The overall module design must channel heat away from the semiconductor devices inside. The thermal design requires forward thinking and mechanical planning in the early stages of the module's overall design. Whether heat transfers through metal pins, solder bumps, or convectors, all require a conduit. Without a well-designed heat interface, the temperature inside the module at higher ambient temperatures may be so high that ICs may operate at or beyond their rated range. It is difficult to meet jitter- and optical-performance specifications even at room temperature. Controlling the laser-output characteristics and other sensitive electrical parameters becomes more difficult because of the need to span from below room temperature to above 85 or even 100°C.

Just as in the case of thermal pathways, module designers must consider electromagnetic radiation early in the product-design cycle. At 10 Gbps, even the smallest hole in a module is an escape conduit for emissions. Designers minimize radiated emissions by limiting signal-edge speeds, keeping signal edges undistorted, properly terminating transmission lines, minimizing cross-coupling, designing tight power bypassing loops, and carefully laying out signal traces. As long as this list might seem, all of these practices are required for good EMI performance.