Design Idea
Microcontroller discerns addresses in RS-485 systems
Edited by Bill Travis
Nigel Brooke and Ted Salazar, Maxim Integrated Products, Sunnyvale, CA -- EDN, 11/8/2001
One of the many benefits of using the RS-485 data-interface system, unlike the RS-232 system, is its ability to implement multidrop networks. Such networks usually carry 9-bit data words, in which the ninth (parity) bit identifies each word as address or data. When using small microcontrollers without a hardware UART, such as IC1 in Figure 1, designers must decide whether to add an external hardware UART or to configure a UART in software. External UARTs once represented a large increase in board area, complexity, and cost, and the available UARTs were usually overkill for simple microcontroller applications. On the other hand, sparing the program memory and processor resources you need for a software-based UART can sometimes be difficult. The program memory in IC1, for example, has only 1k×14 bits of EEPROM. You have a third alternative—a small, low-cost external UART, IC2. The use of this device liberates the program memory you otherwise need for a software-based UART.
An RS-485 bus can carry as many as 256 transceiver modules of the type in Figure 1. IC3 is the RS-485 transceiver, and IC4 is a "microcontroller supervisor" that holds the microcontroller in a reset state until a valid supply voltage is present. Click here to download the assembly-language program for the microcontroller. The application in Figure 1 is a slave-test configuration, but you can modify the code to accommodate any specific RS-485 address-recognition application. The circuit works as follows: When the bus transmits an address, IC2 in each slave module initiates a parity interrupt. IC1 in each module then reads all the data in its internal FIFO, locates the address word, and compares that address with its own address stored in the eight DIP switches. A match causes the slave to clear the interrupt and transmit (to the master) an ASCII "A" (41h), followed by its own address. If the slave module reads the FIFO's contents without finding a match, it clears the current address-word interrupt and waits for the next one.
Is this the best Design Idea in this issue? Vote at www.ednmag.com.
















