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News and New Products
New chip packaging
By Staff -- EDN, 11/8/2001
Intel has introduced a method for housing microprocessors that it hopes will speed development of microchips with more than 1 million transistors. The structure, bumpless buildup layer, is thinner and lighter than conventional packaging. The silicon chip embeds in the packaging where the top connecting layer used to sit. The design could operate at higher frequencies, use less power, and more efficiently move signals around the chip. Chips using the new packaging should emerge in 2006 or 2007.
—The New York Times, Oct 8, 2001
