A typical window comparator uses two comparators and a single op amp to determine whether a voltage is inside or outside a boundary region. Figure 1 shows a typical implementation. IC₁ is an inverting op amp with a gain of –1. V_REF and –V_REF create the window limits. When V_IN becomes more positive than V_REF, the output of IC_2A goes low. When V_IN becomes more negative than –V_REF, the output of IC_2B goes low. If V_IN is lower than V_REF and greater than –V_REF, both outputs of IC₂ remain high. The LM319 and AD548 come in 14- and eight-pin DIPs, respectively. The LM319 accommodates separate input and output power supplies. The input supply can be ±15V referenced to analog ground, and the output can use a logic supply referenced to logic ground. The circuit's input limit is ±2.5V because of the maximum differential-input limit of the LM319. If you think the input will exceed a ±5V differential voltage between V_REF and V_IN or –V_REF and V_IN, then you must incorporate a clamping network with many additional discrete components. The circuit in Figure 2 overcomes these limitations.

To increase the maximum differential-input voltage, you can use an LM311, but it is available only in eight-pin packages, so the circuit would require three eight-pin packages. To reduce the chip count, the circuit in Figure 2 uses an absolute-value amplifier driving a single LM311 comparator, IC₂. Although at first glance the circuit in Figure 1 may look simpler than the one in Figure 2, you can save pc-board area and improve performance by using a dual amplifier in a single eight-pin DIP and an LM311, also in an eight-pin DIP. In Figure 2, when the absolute value of V_IN exceeds V_REF, the output of comparator IC₂ goes low. When V_IN is positive, IC_1A inverts the signal, and the voltage at R₅ is equal to –V_IN. The current flowing through R₅ is –2 times that flowing through R₁, and the output of IC_1B is equal to V_IN. When V_IN is negative, D₂ blocks the output of IC_1A, which is clamped to the forward voltage of D₁. Because the inverting input of IC_1A and IC_1B are both at virtual ground, no current flows through R₃ and R₅. With IC_1A effectively out of the circuit, IC_1B's gain is –1, and the output voltage is positive. The inverting-input voltage of IC₂ is always at a positive value. This circuit is symmetrical for positive and negative voltages. The following expressions define V₂: V₂=|V_IN|=–V_IN–(–2V_IN) for positive inputs, and V₂=–V_IN for negative inputs.

The dual comparators of Figure 1 can have slightly different thresholds. You can select the dual op amps in Figure 2 for input offsets below 1 mV; doing so allows the circuit in Figure 2 to offer improved dc performance. Another advantage of the circuit in Figure 2 is the fact that you need change only R₂ to set the gain of the circuit. Most comparators have offset voltages of several millivolts, so scaling up the input voltage improves accuracy by increasing the signal/offset ratio. The circuit in Figure 1 would require the addition of another op amp to achieve this goal. The simulation in Figure 3 shows the circuit response. Channel A is the output of IC_1B. Channel B is the output of the comparator with V_REF set at 1V. Marker 1 corresponds to the 1V threshold, and Marker 2 corresponds to logic low at the output of the comparator. The circuit in Figure 4 is another variation of the circuit that uses a single 5V supply. It works for input signals of 0 to 5V and V_REF of 2.5 and 5V. The 0 and 5V inputs result in the maximum value of 5V at the output of IC_1B. With V_IN at 2.5V, the output of IC_1B assumes the minimum value of 2.5V.

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