Software reset uses I²C I/O port

You can use the circuit in Figure 1 to allow the I²C or SMBus to control device resets in a system by using the PCA9554 I²C I/O-port IC. Normally, a reset function takes an active-low signal. On power-up of the PCA9554, the IC sets all the I/O pins as inputs. The 4.7-kΩ pull-down resistor on each I/O ensures that all the active-low reset pins are initially in a low state during power-up. You can now program the I²C controller to bring all or some of the external devices out of the reset condition. Figure 2 shows additional details of the I/O internal structure. The PCA9554 has four internal registers. Register 0 is the input-port register. Register 1 controls the output-port register. Register 2 is a polarity-inversion register, and Register 3 is the configuration register. All the registers, except Register 2, are initially set to all logic ones (high).

When you apply power to V_DD, an internal power-on reset holds the PCA9554 in its initial state until V_DD reaches approximately 1.5V. The power-on condition sets all the I/O pins as inputs, so Q₁ and Q₂ are off. The IC has a 100-kΩ internal pull-up resistor on each I/O pin. The 4.7-kΩ external pull-down resistors hold all the attached devices in a reset state. The I²C bus can now control which devices can come out of the reset state. The I²C bus uses unique addresses for slave devices on the bus. The PCA9554 uses an address, 0100xxx R/Wn, where xxx is the level of A2, A1, and A0. To communicate with the PCA9554, the bus master must first send the device address, a command byte that addresses one of the four internal registers, and then the data. After each byte sent from the I²C master, the slave device automatically generates an acknowledge signal on the I²C bus. The master then sends the next byte. The command sequence to bring all the devices out of reset at once is:

ST: Start bit generated by the master;

40: Write to slave address (A0 to A2 are all low in this example);

03: Write the next byte to the configuration register;

00: Write 00 to the configuration register, which sets all I/O as outputs;

SP: Stop bit generated by the bus master.

The default condition of the output register is all logic ones (high). If you want to bring devices out of the reset state one at a time, simply change the pattern written in the configuration register. Any bit left at logic one in the configuration register keeps the corresponding output low (in reset). To place any device into reset, the I²C bus simply writes a logic one into the corresponding bit in the configuration register. Another feature of the PCA9554 is that it remembers the last command byte. Subsequent writes to the configuration register require only a 2-byte operation, provided that no other command register is addressed. For example, the following command sequence brings four devices out of reset (devices attached to I/O0 through I/O3) and then, on the subsequent write, brings the rest of the four devices out of reset:

ST: Start bit generated by the master;

40: Write to slave address (A0 to A2 are all low in this example);

03: Write the next byte to the configuration register;

F0: Set I/O0 through I/O3 as outputs;

SP: Stop bit generated by the master;

40: Write to slave address;

00: Set all I/O as outputs;

SP: Stop bit generated by the master.

If you want to control more than eight devices, you can use the 16-bit I/O-port PCA9555 IC. Using the A0 to A2 address pins and the PCA9555, you can control as many as 128 devices, using the I²C bus or the SMBus. You can find additional information about the I²C bus, including the bus specification, at www.semiconductors.philips.com/buses/i2c/support/. For information about the SMBus, you can go to www.smbus.org/specs/.

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