Design Idea
Make eight-channel measurements through an LPT port
Edited by Bill Travis
J Jayapandian, IGCAR, Tamil Nadu, India -- EDN, 6/13/2002
The circuit in Figure 1 represents a simple and cost-effective way to obtain eight-channel analog-signal acquisition through a PC's LPT port. IC1, a 12-bit, serial-output MAX187 ADC, operates from a single 5V supply and accepts analog inputs of 0 to 5V. IC2, an eight-channel MAX338 analog multiplexer, also operates from a single 5V supply. The circuit acquires eight analog inputs and displays eight independent digital readouts in a Microsoft Windows environment. The MAX338 connects one of eight inputs to a common output through the control of a 3-bit binary address. The design requires no external power supply; it instead derives power from the LPT port's data lines D4, D5, and D6 (pins 6 to 8 on the DB-25 connector). The low-power design consumes less than 1-mA of operating current. You derive the positive supply, V+, and the logic supply, VL, by using IC3, a simple, ICL7660-based voltage-doubler circuit. The ICL7660 is a negative-voltage converter. The bits D0 through D3 (pins 2 to 4 on the connector) provide the channel-selection function. The controlling software in this design uses National Instruments' (www.natinst.com) LabView Version 6.0 graphics language. The software allows for channel selection through the Data port (0x378) and collects the ADC's serial data through one of the bits in the LPT1 Status port (0x379). (The Status port uses Pin 15 on the connector, the LPT port's Error input.) Click here to download the LabView software.
Once the ADC completes the conversion, its Data Ready pin
switches from high to low. The DRDY output of the ADC connects to the LPT's port
Pin 10 on the connector (the Acknowledge input). The controlling software senses
the DRDY signal through the Status port (0x379) on Pin 10 and sets the ADC's
chip-select pin
to
low, through Pin 1 (Data Strobe output) in the Control port (0x37A). The routine
then receives the MSB (most-significant bit) from the ADC. After receiving the
MSB, the software generates the serial-clock output (SCLK) through Pin 14 (Auto
Line Feed output) in the Control port (0x37A) and then receives the remaining 11
bits from the ADC. Upon reception of all 12 bits, the
input goes high to enable the ADC to accommodate new data in its tristate output buffer. The sequence continues, and the digital panel meter displays the acquired data. One input of the LPT port (control port 0x37A, Pin 15) acquires the serial, 12-bit data. The controlling software shifts most of the bits left, according to the bit position, and some of the bits right (because the serial data is in the fourth bit of the data in the status port (0x379)). The software sets other bits to zero.
Finally, a logical OR function of the 12 bytes/words delivers the 12-bit pattern of the acquired signal. For example, the 12th bit (MSB) appears as the first bit for transfer. This bit must be set as the 12th position of the word; hence, the data received through the fourth bit, D3, must shift left through seven positions to be assigned as an 11th bit, and so on. In this sequence of data structuring, once the fourth bit (LSB 4) of the 12-bit pattern appears, it needs no shifting, because it is an actual D3 bit. The third bit, D2, requires shifting in the right position by one, and the D1 and D0 bits need right-shifting by two and three, respectively. This method of shifting and finally performing a logical-OR operation delivers the exact 12-bit data pattern from the serial data received through one line of the parallel port.
D0 through D3 bits in the Data port (0x378) enable the channel selection. For each channel selection, the cited sequence of acquiring the data and conditioning it provides eight independent digital readouts. The downloadable LabView Virtual Instrument program (newmulti_MAX187.vi) is a self-explanatory graphics program for the data-acquisition process. In the program, a time delay of 125 µsec between SCLK and the serial-data read sets the data-transfer rate at 4 kHz. This time delay allows the read cycle to read exactly at the midpoint of the data bit to avoid improper data reads. You can reduce the time delay for faster data acquisition. Figure 2 shows the front-panel view of the LabView Virtual Instrument.
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