Design Idea
Circuit folds back current during fault conditions
Edited by Bill Travis
Martin Galinski, Micrel Semiconductor, San Jose, CA -- EDN, 11/28/2002
You can use monolithic linear regulators at currents lower than 5A for most applications. Most manufacturers of these devices integrate current-limiting and thermal shutdown to prevent damage during fault conditions. For currents greater than 5A, most linear supplies use controllers that allow the user to select the pass element to handle different current requirements. Although these linear controllers may offer current limiting, they generally don't support thermal shutdown. This limitation requires the design to handle the maximum power dissipation and maintain an acceptable junction temperature in the pass element. For example, assume that you use a 1.8V, 8A linear supply operating from a 2.5V rail. The power dissipation in the pass element equals (VIN–VOUT)×IOUT=(2.5V–1.8V)×8A=5.6W. Over the specified temperature range, the pass element must be able to dissipate this amount of power and have a junction temperature lower than the maximum allowable for that device. This approach probably requires three to four D-Pack-size MOSFETS. A big problem arises when you examine power dissipation in a sustained short circuit. Then, the pass element must accommodate 20W of dissipation. It would require 10 D-Pack-size MOSFETs to maintain an acceptable junction temperature. Thus, you must overdesign the supply, increasing cost and board size to survive a possible fault condition. The circuit in Figure 1 solves the problem of current-limit power dissipation.
The circuit uses a separate control loop that "folds back" the currents during a fault condition without involving the problems of linear-foldback current limiting. Linear foldback can have problems tripping the current limit during start-up and returning to full load after a fault condition disappears. These problems tend to lock up the regulator in current-limited state. IC3 provides a high-side reference below the supply voltage and places this voltage on the inverting pin of comparator IC2. The comparator compares this reference signal with the MOSFET side of R1. When the current exceeds the current-limit threshold, IC2's inverting-input voltage is greater than that of the noninverting input. This state causes the comparator to pull the current-sense pin on IC1 low. You can calculate the current-limit threshold as follows:


CURRENT LIMIT=10.207A.
When the current-sense pin drops 50 mV below the input, the regulator turns the output off. This action then causes the current to go to zero, creating a high condition on the output of the comparator. The comparator has an open collector; therefore, the ISENSE pin charges at the RC charge rate of R6 and C3. The output of the regulator remains off, drawing no current, until the ISENSE pin charges to 50 mV below VIN. At this point, the output turns on. R5 and C2 provide a delay before re-engaging the current limit. This delay prevents the current required for charging the output capacitors from prematurely tripping the current limit. It also gives the circuit time to stabilize and to determine whether it can deliver the output current that the load demands. If the load is still too heavy, the current limit re-engages. Figure 2 is an oscilloscope photo of this circuit in operation. This cycling of current, although periodically delivering maximum current, integrates over time into a lower average current. You can calculate average current as a ratio of on- to off-time: IAVG=IPK×(TON/TOFF)=10.2A×(2 msec/17 msec)=1.2A. This reduced average current equates to a reduction in power dissipation. At 1.2A, the power dissipation decreases to 3W.
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