Circuit provides watchdog for microcontrollers

The watchdog circuit in Figure 1 uses a single NAND Schmitt-trigger IC. The circuit is more cost-effective than dedicated, commercially available watchdog ICs. The circuit generates an active-high reset signal upon power-up and remains in a low state as long as the control input receives pulses. Whenever the pulsing at the control input stops, whether the circuit is in a high or a low state, the circuit emits a reset signal. Upon power-up, both inputs of gate IC_1C are low, forcing the Reset output to switch high and the to go low. Thus, the outputs of both IC_1B and IC_1D are high. The high outputs charge the capacitors in the circuit, and, when both inputs of IC_1D reach a high level, the Reset output goes low, and goes high. As long as the control input receives pulses, the outputs of IC_1B and IC_1D deliver pulses. The pulses hold the input of gate IC_1C high and the Reset output low. When the control signal remains in a high state, C₂ begins discharging. When the control signal switches low, the Reset output goes high. The same scenario prevails with C₁ when the control signal remains low. You can choose the values of R₁, C₁, R₂, and C₂ as a function of the watchdog-time duration and the reset pulse width required. With the values shown, the circuit is appropriate for MCS51-family microcontrollers. The duration of the watchdog time is approximately 300 msec, and the reset pulse width is approximately 10 msec.

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