Many electronic systems require both positive and negative voltages to operate properly. Generating an efficient, low-voltage positive output from a higher voltage input typically entails the use of a synchronous buck regulator. But when generating a negative output voltage from a positive input voltage, you'd typically use a flyback topology, especially at higher output currents. The operation and control characteristics of a synchronous buck and a negative flyback (also called a buck-boost) differ significantly. Figure 1 shows the basic components that a negative flyback circuit requires. When FET Q₁ turns on, the input voltage appears across inductor L₁ with no input current going to the load at this point. All the output current delivered to the load at this time comes from output capacitor C₁, because diode D₁ is reverse-biased. The current in the inductor continues building until the control circuit determines the proper time to switch off FET Q₁. At that point, the voltage polarity across inductor L₁ reverses in an attempt to maintain current flow, pulling the top side of the inductor negative with respect to ground and forcing diode D₁ to conduct. The output voltage goes negative to within a diode drop of the inductor voltage.

The duty cycle at which the control circuit operates also differs from that of a synchronous buck. Although the operating duty cycle of a synchronous buck is D=V_OUT/V_IN, the negative flyback operates at D=V_OUT/(V_OUT–V_IN). For example, if the desired output voltage is half the input voltage, the synchronous buck runs at 50% duty cycle, whereas the negative flyback runs at 33% duty cycle. The comparisons between the simple negative flyback circuit of Figure 1 and the synchronous-buck-controller negative flyback circuit in Figure 2 are straightforward. In Figure 2, FET Q₂ mirrors the function of diode D₁ in Figure 1 but with a decrease in the forward drop that occurs in the diode. This lower drop significantly improves efficiency. Diode D₃ conducts during the small dead time, when both FETs Q₁ and Q₂ are off, further reducing losses. The feedback voltage appears at the output ground through resistor R₁, because the control circuit is referenced to the negative output voltage. R₂ typically sets the output voltage to the desired level, because it does not change the feedback compensation network, as changing R₁ would. Desired changes to the input voltage, the output voltage, or both may necessitate an inductor-value change. The minimum inductor value is:

Take note of certain limitations with using the controller in this type of implementation. Because the control circuit is referenced to the negative output-voltage rail, the controller must have an input-voltage rating greater than V_IN+|V_OUT|. The controller must also be rated for V_IN (minimum), which occurs at system power-up when the output voltage is zero. A controller that operates over a wide input-voltage range typically works best. The FET's drain-to-source rating must also withstand V_IN+|V_OUT|, and the FET carries peak currents that are greater than twice the output current. Low-resistance, fast-switching FETs produce the lowest losses. High efficiency is the major advantage of this circuit. Because the circuit uses n-channel FETs, as opposed to higher resistance and costlier p-channel parts, the circuit achieves peak efficiencies greater than 90%.

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