One of the key challenges in the design of 4- to 20-mA current transmitters is the voltage-to-current conversion stage. Conventional transmitters use multiple op amps and transistors to perform the conversion function. These approaches have been around for a long time, but they are usually inflexible, have poor power efficiency, and have limited current compliance. An improved Howland current pump, on the other hand, can be cost-effective, because it addresses the cited problems. In addition, it closely models an ideal current source with the potential for nearly infinite output impedance. Figure 1 shows the improved Howland-current-pump topology, implemented with a high-resolution DAC, a precision reference, and a high-current op amp. Analyzing the circuit in Figure 1 (neglecting the loading effects at the output of IC₃), the voltage at V_X is V_X=(V_REF×D)/2^N, where D is the decimal equivalent of the DAC's digital code and N is the number of bits.

Analyzing nodes V_L and V_N, you obtain

EQUATION 1

EQUATION 2

Because V_N and V_P are virtually shorted, you obtain

EQUATION 3

Substituting V_N and V_OUT, I_L becomes

EQUATION 4

Making R₁=R₁′, R₂=R₂′, and R₃=R₃′ simplifies Equation 4 to

EQUATION 5

According to Equation 5, you can use R₃′ to set the circuit's sensitivity. You can make R₃′ as small as necessary to achieve the desired current and improve the load range. As an alternative, you can make the other resistors large to keep the quiescent current low for high power efficiency. The improved Howland current pump is flexible. It offers both current-sink and-source capability. The input voltage at V_X is polarity-insensitive; you can apply it to either R₁ or R₁′. You can connect the load to the supply rail as a high-side load, or you can refer it to a low-side supply or ground (Figure 1). Further, one of the primary advantages of this topology is that the current pump provides potentially infinite output impedance, like that of an ideal current source. However, you must pay strict attention to resistor matching. You can see the importance of matching by examining the circuit's output impedance. If you ground all inputs and apply a test voltage at V_L, you can see that

EQUATION 6

Equation 6 shows that, if the resistors are perfectly matched, Z_OUT is infinite. Infinite output impedance is a desirable characteristic of a current source because the resistance of the load does not affect the current flowing in the load. On the other hand, if the resistors are not matched, Z_OUT can be either positive or negative. Negative Z_OUT causes instability because of the existence of a right-half-plane pole in the s-plane domain. Any amount of parasitic capacitance—from poor pc-board layout, op-amp differential capacitance, or both—at the inverting node of IC₄ could cause instability or worse. These parasitics, along with R₁, introduce a zero into the noise-gain transfer function, resulting in a slope of 20 dB per decade. If the noise-gain transfer function of the amplifier intersects with the open-loop response at a slope (rate of closure) equal to or greater than 40 dB per decade and the open-loop gain at the intersection exceeds unity, then the circuit is likely to be unstable. The circuit may ring, show gain peaking, or conditionally oscillate after a step function in the DAC adjustment.

An effective approach to the stability problem is to insert a pole into the noise-gain transfer function by adding a compensation capacitor, C₁. This capacitor creates a pole to keep the rate of closure at 20 dB per decade. Optimum compensation occurs when R₁C_PARASITIC=R₂C₁. Because C_PARASITIC is unknown, you should determine C₁ empirically to obtain optimum results. In general, C₁ in the range of some tenths of a picofarad to a few picofarads satisfies compensation requirements. Note that optimum compensation attempts to balance the fact that a small C₁ cannot compensate for all possible causes of oscillation, whereas large values of C₁ could adversely affect the settling time of any DAC. Consider the following design objectives: 16-bit programmability, four channels, small form factor, a maximum ground-referred load of 500Ω with 10V compliance, 90% minimum efficiency, and 50-mW maximum dissipation from each resistor.

Given the requirements of small form factor and high precision, the design in Figure 1 uses IC₂, the a 16-bit current-output AD5544 DAC, with an external op amp instead of a voltage-output DAC. You face some important trade-offs in deciding whether to use a current-output or a voltage-output DAC. Current-output devices typically cost less than voltage-output DACs. The design must convert the current to a voltage to run the current pump, and the external op amp determines the accuracy of this conversion. Thus, you have control of the amount of accuracy as your application requires. Voltage-output DACs generally cost more than current-output devices because the current-to-voltage conversion takes place in the package, entailing the inclusion of an op amp. Although a voltage-output DAC reduces component count in this design, you have to accept a particular accuracy figure based on the specifications of the op-amp buffer inside the DAC. Both approaches typically require an external reference. In the end, a current-output approach yields the highest accuracy at comparable cost and board space.

Although IC₃, which performs the current-to-voltage conversion, can be almost any precision op amp using ±15V supplies, IC₄ requires adequate current-driving capability to handle the maximum 20-mA load. The improved Howland current pump is insensitive to load-resistance perturbations. Only IC₄'s supply voltages limit the compliance voltage. A 500Ω load, for example, can place V_L as high as 10V at 20-mA load current. This scenario sets V_OUT at 11V, requiring the op amp to swing within 4V of the positive rail. The AD8512 dual op amp can drive 20 mA into a 500Ω load using ±15V supplies. However, IC₄'s output-voltage swing is likely to limit resistive loads to 500Ω in this application. This design uses the 10V ADR01 reference because it is precise and compact.

To minimize the power in the resistors, you start with R₃′=50Ω. R₃′ is in the direct load-current path, and it carries just slightly more current than the load, assuming R₂′+R₁′>>R_L. At the 20-mA peak current, the power dissipation is just above 20 mW. With the limited headroom between the supply and the compliance voltages, you should scale the ratio between R₂ and R₃ such that the additional gain does not saturate IC₄. As a result, you should choose R₂ to be 10 times smaller than R₁. Using Equation 5 and the resistance-matching criteria, you obtain the following values: R₁=R₁′=150 kΩ; R₂=R₂′=15 kΩ, and R₃=R₃′=50Ω. It's desirable to add a 1- to 10-pF capacitor, C₁, to the negative-feedback path to avoid possible oscillation arising from eventual resistor mismatch.

A 16-bit, programmable, 4- to 20-mA current transmitter theoretically has 0.3-µA resolution. The actual measured performance of the circuit in Figure 1 shows that the worst-case integral-nonlinearity error is approximately 4 LSBs. This error is equivalent to 1.2 µA, or 0.006% total system error, well within most systems' requirements. Figure 2 shows the measured results at 25 and 70°C.

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