Antifuse FPGA shoots for the stars

Actel's Axcelerator family brought embedded SRAM capability to the company's antifuse product line, so it's not surprising to see embedded SRAM on the Axcelerator-derived RTAX-S high-reliability family (see "Lithography advancements 'axcelerate' antifuse lineage," EDN, July 11, 2002, pg 22).

Antifuse-based configuration elements are inherently immune to the radiation bombardment that intensifies as systems operate farther from the Earth's surface and that wreaks havoc on alternative flash- and SRAM-based FPGA-configuration structures. The registers in all FPGAs' logic cells, however, are susceptible to cosmic ray-generated SEUs (single-event upsets). Both they and the embedded memory will require radiation-hardening augmentation, and Actel will have to eliminate other Axcelerator circuits before the company deems the architecture fit for space travel (see "Banish bad memories," EDN, Nov 22, 2001, pg 61).

Actel replaced each Axcelerator register with a three-latch counterpart that it previously used in the RTSX-S product family; unaffected latches "outvote" a latch that an ion strike has disturbed. The company supplements each embedded SRAM array with a shortened Hamming code-based EDAC (error-detection-and-correction) soft core that not only fixes the data read from the memory, but also writes the "scrubbed" information back to the affected SRAM location (Picture). RTAX-S lacks Axcelerator's PLLs, per-pin FIFOs, I/O-FIFO embedded controllers, low-power circuits, and programmable input delay elements; Actel recommends that your design, when operating in radiation-abundant environments, should not employ the residual embedded FIFO controllers and JTAG functions. The company estimates that, as a result of its reliability optimizations, RTAX-S chips will tolerate more than 37 LETs (linear-energy transfers) of radiation and exhibit less than 10^–10 memory upsets/bit-day, along with delivering TID (total ionizing dose) performance in excess of 200,000 rads.

The words "will deliver" are key; Actel doesn't plan to start shipping RTAX-S engineering samples until the end of the year (Table 1). The company schedules production to begin during the second half of next year, following a lengthy qualification cycle. Actel's Designer and Libero EDA software support RTAX-S, however, and the company is also shipping Axcelerator chips in RTAX-S-compatible packages, along with memory EDAC and $9995 MIL-STD-1553B bus-controller soft cores for prototyping. Keep in mind the functional differences between the two product families as you develop your designs, and employ synchronous-design techniques to mitigate internal timing variations between them. At an end-of-2004 price of $14,000 (one), the RTAX1000 might at first glance seem outrageously expensive until you add up the per-chip and amortized NRE (nonrecurring-engineering) charges for the (likely) even more costly low-volume ASIC alternative.

Actel, 1-408-739-1010, www.actel.com.