Formal-verification product debuts

Magellan, a new hybrid formal-verification product from Synopsys, combines formal engines with the built-in VCS-simulation engine to help engineers uncover bugs. This architecture finds bugs by uniquely combining VCS's ability to reach deep into the design with the formal engines' ability to perform advanced mathematical analysis. The built-in VCS and formal engines leverage each other, reducing iterations and saving time. Formal-verification engines may report false-negative bugs, which, although real in the logic, are false because the combination of states that energize the bugs never occur in the product. Magellan's hybrid architecture handles multimillion-gate designs and provides deterministic results without false-negative errors. Magellan supports Verilog and VHDL designs and works with the emerging SystemVerilog standard.

With the addition of Magellan, the Synopsys DVP (Discovery Verification Platform) now enables hierarchical verification, a technique that allows VCS to reuse block-level assumptions and assertions as chip-level monitors. Prices for Magellan begin at $73,500 for a one-year technology-subscription license.

Synopsys, 1-650-584-5000, www.synopsys.com.