FROM EDN EUROPE: FPGAs target another slice from the ASIC pie

Xilinx has announced the Spartan-3, a new generation of its "cost-reduced" high-density FPGA family. Devices in the family will range from 50,000 to 5 million gates using Xilinx's "system-gates" metric, or about 1700 to 75,000 logic cells. The company, which describes Spartan-3 chips as very different from preceding Spartan parts, will manufacture the devices in a 90-nm process technology, making the chips some of the first commodity parts in that much-discussed geometry to reach the market. Forecast pricing for mass-production parts in 2004 allows Xilinx to anticipate a price of less than $100 (250,000) for 4 million gates. (Devices with 1 million gates will costs less than $20, and 50,000-gate devices will cost $3.50.) The company says this price will enable it to take more market share from low/middle-range cell-based ASICs, given the much lower engineering costs of FPGA designs.

Xilinx pitches the new series of devices, which share the design flow and IP (intellectual-property) resources of the Virtex family, at applications requiring high-performance DSP functions. New features include the digitally controlled impedance ("XCITE"), first used in the Virtex devices, that lets you tune I/O drivers to actual interconnect impedances, plus digital clock management for complex clocking schemes. Xilinx has also increased the ratio of memory to logic; the largest device in the new series offers as much as 1.8 Mbits of block RAM and 520 kbits of distributed RAM.

You can build DSP functions on the programmable logic that use embedded DSP hardware in the form of preconfigured 18-bit multipliers—as many as 104 multipliers in the largest family member. A design flow begins with algorithm development in tools such as Matlab and Simulink, and Xilinx's cost-effectiveness metric claims that you can achieve 3 billion "MACs per second per dollar." Available and planned IP for the devices includes complex DSP functions, such as filters, downconverters and synthesisers, forward-error-correction algorithms, and networking codecs.

Xilinx, +44 870 7350600, www.xilinx.com.