News and New Products

Tool addresses hybrid timing analysis

By Gabe Moretti -- EDN, 7/10/2003

Traditional timing-analysis methods fall short in DSM (deep-submicron) designs because they cannot account for the timing impact of dynamic effects, such as crosstalk. To address this problem, Nassda has introduced Hanex to help engineers find critical delay paths in combinatorial, latch/flip-flop, and dynamic logic. Hanex simultaneously simulates critical paths, taking into consideration voltage-dependent capacitance, Miller capacitance, and nonlinear input slopes to provide better accuracy. In addition to timing checks, the tool verifies setup-and-hold timing for sequential logic and uses dynamic-clock-network analysis to provide slack information.

Hanex crosstalk analysis uses internal dynamic simulation to calculate the delay caused by coupling capacitors, a growing source of errors as geometries decrease. The tool’s concurrent-propagation ability analyzes the maximum impact of neighboring nets on circuit performance, capturing the signal-transition windows and transition states to provide accurate delay calculations and reveal crosstalk effects. It also uses its hybrid capabilities to perform clock-network-timing simulation by automatically identifying and tracing the clock network starting with user-defined clock sources. After the designer has back-annotated the interconnect parasitics to the associated clock network, Hanex dynamically simulates the entire network with precise fan-out loading and uses clock-arrival time and slope at every clock sink for timing verification. The product is available on Solaris, HP-UX, Microsoft Windows NT/2000/XP, and Linux platforms. Time-based licenses start at $72,000.

Nassda Corp, 1-408-988-9988, www.nassda.com.