Feature

Don't overlook cable and connector imbalances in POE applications

Using network wiring to supply power to networked devices makes installing the devices much easier. Whereas POE (power-over-Ethernet) designs aren't rocket science, designers still have to know what they're doing.

By Hank Hinrichs, Pulse Inc -- EDN, 6/26/2003



One of the great success stories of the information age has been the advent of LANs. By interconnecting PCs and their peripherals into a common LAN, you can share all the information and work of each. With implementation costs steadily decreasing, LAN connections now enable you to use devices that you once couldn't economically justify. IP (Internet Protocol) telephony, Web cameras, wireless access points, home automation, and building management represent just a few examples.

In some markets, the costs associated with providing power to the connected devices have presented barriers to LAN interconnection. In an effort to control these costs, the IEEE 802.3 working group is developing a POE (power-over-Ethernet) standard, IEEE 802.3af, that will allow the data link to provide each connected device with as much as 12.95W of unregulated dc power.

The PSE (power-sourcing equipment) injects a phantom current into a transformer's center tap, where it divides and passes through one of two pairs of balanced transmission lines (Figure 1). At the far end, the two currents pass into a transformer in which they recombine to form the power source for the PD (powered device). The device's return path uses the other pair of balanced transmission lines. The proposed standard sets at 350 mA total (or 175 mA per path) the maximum current that the device can continuously draw.

One drawback that you should always consider in implementing this scheme is the cabling's resistive imbalance. A typical cabling channel can contain as many as five interconnects and 100m of wire (Figure 2). In the proposed standard, the resistance balance between the channel's two paths, which is specified not to exceed 3% of the sum of the resistances in the two paths, is computed as follows:

EQUATION 1

where RMAX is the path with the higher resistance, and RMIN is the path with the lower resistance.

At the maximum current, this imbalance equates to a 10.5-mA bias on the transformer's core. Under all tolerance and temperature conditions, transformers for 100BaseTX applications have a minimum inductance of 350 µH with 8 mA or less of dc bias. A transformer that can tolerate only this amount of bias reduces the maximum current the power-sourcing equipment can deliver before the transformer saturates to:

EQUATION 2

Consider the case in which only a 5m patch cable separates the power-sourcing equipment and the powered device. These conditions, which don't comply with the proposed standard, can cause the current imbalance to exceed 42 mA. You can verify this fact by setting RB in Equation 3 to zero and solving for IIMBAL.

To restore the current capability to 350 mA, you must employ a ballast circuit. Figure 3 details a method for resolving cable and connector imbalances by using two resistors. Note that each end of the transmitting and the receiving channels requires these ballast resistors. Adding the capacitor in parallel with the resistors helps to minimize the signal loss that results from the ballast resistors. You should select the capacitor to present a low impedance at the lowest signal frequency. Although the capacitor's value depends on the implementation, selecting 0.22 µF results in less than 0.5 dB of loss at 100 kHz.

Table 1 details the resistance of different cable sizes over minimum and maximum temperature ranges. Subsequent calculations use these resistance values to resolve connector imbalances and voltage drops.

For calculating the ballast resistors, the typical maximum configuration uses five connectors. In each connection point, one contact measures 0Ω, whereas the other contact measures 0.02Ω—the maximum resistance that IEC 512-2 allows (Reference 1). Furthermore, the model uses a 5m length of 22 AWG cable, because longer cable reduces the effect of the connectors' contribution to the imbalance. The equations describing this interaction are:

EQUATION 3

where IOUT (the maximum current from the PSE)=350 mA, IIMBAL (the current difference between the two pairs)=58 mA, RC (5m of 22 AWG cable)=0.24Ω, RB (the ballast resistance)=6.6Ω, and RCONN (the total contact resistance for five connectors)=0.1Ω.

Under these conditions, the worst-case current imbalance is 6.25 mA. Using 3.3Ω ballast resistors increases the total voltage drop associated with the cabling by:

EQUATION 4

The proposed standard requires the equipment to supply a minimum voltage greater than 44V and the powered device to present a maximum voltage no larger than 36V. At the maximum current, this 8V margin permits as much as 45.7Ω of resistance per conductor path between the power-sourcing equipment and the device. Even under worst-case temperature and tolerance conditions, using 3.3Ω ballast resistors in series with 100m of 26 AWG cable still provides a margin of:

EQUATION 5

The ballast resistors dissipate worst-case power during an overcurrent condition, which the proposed standard sets at 450 mA. In this case, the wattage rating of the ballast resistors is:

EQUATION 6

Therefore, a resistor having a 0.25W rating suffices.

With this latest IEEE-proposed standard, LAN devices requiring modest amounts of power now have the option of receiving it from a central hub. However, when employing this feature, you should consider adding ballast resistors to eliminate the possibility of saturating the isolation transformers.

An alternative to implementing ballast resistors is to design a custom magnetic module that can accommodate the added offset current. The downside of this approach is added cost and module size, due mainly to the design's requiring a larger magnetic structure. Furthermore, it is economically unrealistic to design a transformer that can tolerate the 42 mA possible when minimal distances separate the power-sourcing equipment from the powered device.

Of course, you can elect to do nothing, in which case the transformer may saturate, and the burden of signal restoration will fall on the baseline-wander-correction circuits in the physical-layer chip. Unfortunately, some legacy LAN chips lack such circuits.


Author Information
Hank Hinrichs has worked as a design engineer at Pulse for more than 30 years. During that time, he has been involved in the design of numerous dc/dc converters, filters, and other magnetic modules for both the LAN and the telecommunications industries.


Reference
  1. IEC 512-2, Electromechanical Components for Electronic Equipment; Basic Testing Procedures and Measuring Methods; Part 2: General Examination, Electrical Continuity and Contact Resistance Tests, Insulation Tests, and Voltage Stress Tests.



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