Improving design reuse

Reusing analog blocks requires significant manual effort to correctly place and size cells. The effort is even greater when you move your design to a new process. Sagantec has developed Anaconda to address these issues. The schematics-driven tool integrates with Cadence's (www.cadence.com) Virtuoso XL to accelerate the manual-layout tasks of placing and sizing analog cells. Anaconda uses a geometry-compaction engine to read device parameters and topology constraints from schematics. The engine checks and guarantees symmetry, wire widths, matching, alignment, and adherence to design rules.

You can also use Anaconda with first-time analog designs to refine a given topology or to implement engineering-change orders. Anaconda is available on Solaris, HP-UX, and Linux platforms. The price for a one-year license is $55,000.

Sagantec, 1-510-360-5200, www.sagantec.com.