News and New Products

Modeling tool now works with 130-nm and smaller geometries

By Gabe Moretti -- EDN, 10/16/2003

The increase in system-on-chip integration and shrinking semiconductor process geometries challenge designers with new physical and optical effects. For example, resistance as a function of width, metal fill, wire-edge enlargement, dishing, and erosion significantly reduces the accuracy of parameter-extraction engines. Addressing these problems, Cadence has released Version 3.2 of its Fire & Ice QXC that incorporates new 3-D models that account for copper and optical effects. The tool provides bounded accuracy limits for both total and coupling capacitance for signal nets in a design so that designers can perform more accurate signal-integrity analysis than previously possible.

The tool integrates seamlessly with the Cadence Encounter digital-IC-design platform. You use the tool during placement and routing of complex designs; it directly extracts interconnect parasitic data into the SoC Encounter timing database format, but you can also integrate it with other place-and-route tools via industry-standard file formats. A one-year use license for Fire & Ice QXC 3.2 is available for $50,000 under a promotion that runs through the end of 2003. The list price of the same license is $144,000.

Cadence, 1-408-943-1234, www.cadence.com.