FROM EDN EUROPE: Microcontrollers gain DSP attributes in "hybrid" architecture

In its 56F83xx family of microcontrollers, Motorola has introduced a series of devices that it intends to meet uprated processing needs in today's systems—particularly in automotive systems—while keeping 8/16-bit economics and avoiding the shift to 32-bit controllers. The defining features of the device series are the inclusion of some DSP attributes and the use of on-chip flash memory instead of EEPROM. The term "hybrid" describes the devices' combination of microcontroller and DSP functions. These devices are not hybrid in the sense that they combine twin processing cores; rather, they add the facility to efficiently execute certain DSP-like arithmetic functions—multiply-accumulate operations, for example.

Demand for this class of processing arises from applications such as electrical power-assisted steering, active suspension, and other electric-motor controls. Adding the functions to the base microcontroller feature set is necessary to efficiently complete these jobs and also precludes the need for a full dual-processor-core architecture.

The device family, which is produced in 0.25-micron CMOS and is qualified to the full automotive-temperature range, spans six parts, all rated at 60 MHz/60 MIPS. They include 36-bit accumulators and barrel shifters, as well as an extended instruction set with unique addressing modes, but they retain microcontroller-style stack support. Flash-memory-array sizes are 48 to 256 kbytes across the range, and RAM sizes are 2 to 8 kbytes. A full development kit and tool chain is available with support for the hybrid-DSP functions. Devices will cost $6 to $11 (10,000).

Motorola, www.motorola.com/semiconductors.