Xilinx has disclosed the details of a new architectural design style on which it will base future high-density programmable products, including future members of the Virtex Pro line.

With manufacturers now adding features such as embedded IP, high-speed I/O, and mixed-signal functions to high-end FPGAs, the structure recognises the disparate nature of these circuit blocks and allows for their separate development. Xilinx will marry appropriate groupings of circuit blocks—FPGAs plus others, as required—to provide "platform" chips specific to given application areas. Geometrically, Xilinx says it will base the ASMBL (application-specific modular-block architecture) on columns, or "stripes,". A generic signal-processing platform might, for example, bundle together FPGA, memory, embedded or "hard" DSP cores, and, perhaps, high-speed I/O in separate columns. Separate teams at Xilinx would develop, verify each function, and shape it into a "stripe" to fit the new architecture. The company says that the ASMBL structure will allow it to rapidly bring the groups together.

Xilinx simplifies interconnect within the chip by the use of leading-edge processes with 10 or more layers of metal. The company simplifies interconnect off the chip by the use of flip-chip technology (as for dense DRAMs), so that you can take I/Os from anywhere on the chip surface and need not bring them out to a chip boundary. Chip architects are now free, the company says, to vary the ratio of logic to I/O as required on a given chip design and are not constrained by the perimeter-to-area relationship that comes into play when all I/Os are on the periphery. Likewise, you can now directly feed power and ground to the most power-hungry functions; they need not make their way in from the edge of the chip.

The architecture leaves open the possibility that Xi-linx might create a chip that has no programmable logic at all. A company spokesman acknowledges such a chip as a possibility but says it is not a programme objective. The first domain-specific products based on the architecture will appear early next year; 2004 will also see the first product to be built with 10⁹ transistors, Xilinx says.

Xilinx, +44 870 7350 600, www.xilinx.com.