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The nuances of op-amp integrators

By Ron Mancini -- EDN, 3/18/2004

An integrator that you configure with an op amp is a simple circuit consisting of a resistor, a capacitor, and an op amp, so how can anything go wrong? In Figure 1, when ZF is a capacitor, the closed-loop ideal-gain equation is G=–1/RGCs, where s is the Laplace complex operator. Thus, the circuit performs a pure integration. Some designers mistakenly claim that this configuration can be unstable, so you can calculate the loop gain using Equation 1 to determine whether a potential stability problem exists.

EQUATION 1

where a is the op-amp open-loop gain.

On the well-known Bode plot, the zero contributes 90° positive phase shift starting at the lowest frequency axis, and the pole contributes –45° phase shift at the frequency at f=1/(2πRGC). The total phase shift is 45° at f=1/(2πRGC), and the phase shift decreases to zero at approximately 10f. The phase shift never comes close to the –180° required for instability, so the circuit problems must be elsewhere.

Op amps contain transistors that require input currents. The input current flows from ground into the circuit if the op amp has npn input transistors, and the current flow is opposite for pnp transistors. The inverting-input current flows from ground through RG and C. Regardless of how small the input current is, it eventually charges the capacitor, causing the op amp to saturate at the positive rail (for pnp input transistors).

You can easily solve the saturation problem by adding a resistor in parallel with C; the resistor supplies the bias current, and saturation reduces to a small voltage offset. The closed-loop gain and loop-gain equations with the added parallel resistor follow:

EQUATION 2

and

EQUATION 3

Read more Analog Angle

You lose the pure integration with the addition of RF. The circuit is an amplifier with an inverting gain of –RF/RG until the input frequency approaches f=1/(2πRFC). Then, it acts as an integrator for higher frequencies, or a lowpass filter. The zero in the loop gain always precedes the pole in the frequency domain; thus, this circuit is always stable. Actually, you often add a feedback capacitor to an amplifier to reduce noise and overshoot.

A step-function input voltage causes an input current of VIN/RG, and the input current could damage the capacitor, damage the op amp, or cause ringing. Engineers often put a small resistor in series with the capacitor to improve reliability. The closed-loop gain and loop-gain equations with the added series resistor follow:

EQUATION 4

and

EQUATION 5

You regain the pure integration if RGC is greater than RFC, and this integration lasts almost until f=1/(2πRFC). The loop gain has a zero, which contributes 90° positive phase shift at the low-frequency axis, so the pole usually can't cause instability. Situations might arise in which RGC is less than RFC and the circuit is unstable, but I've never seen this case.

Some final points to consider are:

  • Nonrepetitive input signals require resetting the integrator by discharging C (FET in parallel with C),
  • C is subject to dielectric stress that can cause a dual slope integration, and
  • you must account for C's leakage current.

Inverting integrators are well-behaved circuits, but, like all analog circuits, they require attention to detail.


Author Information

Ron Mancini is staff scientist at Texas Instruments. You can reach him at 1-352-569-9401, rmancini@ti.com.

 

 

 

 




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