Zibb

Design Idea

Processor's PWM output controls LCD/LED driver

Edited by Bill Travis

Joe Neubauer, Maxim Integrated Products, Sunnyvale, CA -- EDN, 5/27/2004

The PWM (pulse-width-modulation) output available from many microprocessors is based on an internal 8- or 16-bit counter and features a programmable duty cycle. It is suitable for adjusting the output of an LCD driver (Figure 1), a negative-voltage LCD driver (Figure 2), or a current-controlled LED driver (Figure 3). The circuit comprises simply the PWM source, capacitor C, and resistors RD and RW. For CMOS circuits, you calculate the open-circuit output voltage as VCONT=D×VDD, where VCONT is the control circuit's output voltage, D is the PWM duty cycle, and VDD is the logic-supply voltage. The control circuit's output impedance is the sum of the resistor values RD and RW: RCONT=RD+RW. For the circuit of Figure 1, the output voltage, VOUT, is a function of the PWM average voltage, VCONT:

 

where VREF is the reference voltage at the feedback input.
Bear in mind that the initial charge on filter capacitor C produces a turn-on transient. The capacitor forms a time constant with RCONT, which causes the output to initialize at a voltage higher than that intended. You can minimize this overshoot by scaling the value of RD as high as possible with respect to R1 and R2. As an alternative, the microprocessor can disable the LCD until the PWM voltage stabilizes. For Figure 2, the output voltage, VOUT, is a function of the PWM average voltage, VCONT:
 

 

where VREF is the reference voltage at the feedback input. For Figure 3, the output current is a function of the PWM average voltage, VCONT:

where VREF is the reference voltage at the Set output and K is the current-scaling factor.

RD isolates the capacitor from the feedback loop in the PWM-control methods. Assuming a stable voltage at the feedback point, the following equation defines the lowpass filter's cutoff frequency: fC=1/(2πRC), where R=RD||RW. To minimize ripple voltage at the output, you should set the cutoff frequency at least two decades below the PWM frequency.

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