The add-on circuit in Figure 1 can produce one to 15 burst pulses with the same number of spaces between the bursts at a pulse width (frequency) that an external square-wave generator at the input sets. The add-on circuit produces a variable number of bursts and a variable number of spaces between the bursts by using an external square-wave generator as a source. The project in this design required a TTL burst signal, but resources did not allow for the expense of a burst generator. The circuit basically comprises two hexadecimal, divide-by-16 counters set up so that the counter on the left produces a user-selectable zero to 15 pulses and the counter on the right produces a user-selectable zero to 15 spaces. The two hexadecimal thumbwheel switches select the number of pulses and spaces.

Counter IC₁ controls the number of bursts, and counter IC₂ controls the number of spaces. The two hexadecimal thumbwheel switches, S₁ and S₂, select the count value. Each switch position is numbered zero to 15. S₁ controls the number of burst pulses, zero to 15, and S₂ controls the number of spaces, zero to 15. For either the IC₁ or the IC₂ counter to count, Pin 7 must be high. If Pin 7 is low, then the counter remains disabled. For a counter to be loaded with a desired count, Pin 9 must be low and then high. The carry output at Pin 15 is normally low until the counter reaches a count of 15, and then it goes high. When the circuit is powered on, resistor R₁ and capacitor C₁ form an RC-time-constant power-on-reset circuit at Pin 1. This feature initializes the counters to the zero state upon power-up. After that, the thumbwheel switches set the count value.

When a clock signal arrives at the counters' Pin 2 with the desired frequency, counter IC₁ starts counting up, and counter IC₂ remains in the off-state because the low signal at IC₁'s Pin 15 carry output applied to IC₂'s Pin 7 disables counter IC₂. When IC₁'s count reaches the end (15), it goes high and enables IC₂ to count. IC₁'s carry output also goes through inverter gate IC_3A and then to the OR gate IC₄'s Pin 1. The low signal on one input of IC₄—and the fact that, because IC₂ is now counting, its carry output at Pin 15 is also low at IC₄'s Pin 2—means that a low signal appears at IC₁'s Pin 7, and thus IC₁ now becomes disabled. Both IC₁ and IC₂ counters' Enable pins are cross-connected, so that when one counter is counting, the other counter becomes disabled. The two counters work in this way, back and forth, counting up to 15 and enabling and disabling each other. And finally for the two counters, when the carry output on IC₂ goes high, the circuit then, after it reaches a count of 15 through the inverter IC_3B, loads a new count or reloads the old count into the counters as set by the thumbwheel switches for the next count.

When IC₁ is counting, the output of IC_3A (the gate signal), assumes a high level at AND gate IC₅'s Pin 2. This state allows the clock signal to pass through IC₅ unimpeded to the output. The output of IC₅ is the burst output. When IC₁ is disabled and IC₂ is counting, the gate signal from IC_3A asserts a low signal at IC₅'s Pin 2. The output is also low and produces no bursts. You can configure this circuit to produce even more pulses or spaces by simply cascading more counter chips where needed. Also, you can replace switches S₁ and S₂ by an 8-bit write-output register, making the pulse and space counts software-controlled, or you could apply the gate signal to the control input of a CMOS switch to burst analog signals, such as sine waves at its input.

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