I²C is a popular serial protocol for power controllers, ADCs and DACs, EEPROMs, and other devices. In certain data-acquisition and power-control situations, you must isolate the I²C master from one or more slave devices for noise, grounding, or safety issues. Also, although 128 peripherals may connect to the bus, at some point, differences in ground potential and excessive bus capacitance begin to erode noise and timing margins. This Design Idea shows how to provide fast, glitch-free optical isolation of I²C or SMBus signals by using a method that meets the requirements for the 400-kHz enhanced-I²C-bus specification. The I²C bus consists of bidirectional clock and data lines (SCL and SDA) that are pulled up with resistors or current sources. Devices connect to the bus with open-collector I/O pins. One way to isolate I²C signals is with a variation of the circuit shown in Figure 1, which shows only SDA; SCL operation is identical.

The circuit in Figure 1 works on the principle that a device pulling the nonisolated SDA line low turns on an optocoupler LED, pulling the isolated SDA line low and disabling the isolated side's optocoupler LED and vice versa. However, if devices on both sides of the isolation barrier are pulling their respective SDA lines low, the optocouplers are in an indeterminate state, with both LEDs partially on. When the nonisolated device releases its SDA line, the voltage on the line rises until the isolated side's LED can turn fully on. Only then will the nonisolated SDA line go low again. This situation occurs at various times during I²C communications, including clock synchronization (on the SCL line), multimaster arbitration, and SMBus interrupt arbitration (on the SDA line). Figure 2 shows details of the operation of the circuit in Figure 1. The 74HC125 tristate noninverting buffers simulate the open-drain outputs of two I²C devices. A logic low on the line forces the output low, and a logic high puts the output in a high-impedance state. Traces 1 and 2 show the inputs to the enable lines of the SDA and isolated-SDA buffers. Traces 3 and 4 show the outputs, respectively.

This type of circuit has been published in a number of forms, often with slow optocouplers that require 5 to 10 mA of LED drive. These circuits may work in a limited set of applications, but they are slow and still produce glitches, and trying to overcome speed and drive issues with high-speed components makes the circuits almost unusable. The circuit in Figure 1 uses fast HCPL2300 optocouplers that require only 500 µA of LED drive. If both SDA lines are held low and then released at the same time, the optocouplers fight each other and form an oscillator (Figure 3). The characteristics of this oscillation depend on pullup resistance, supply voltage, and capacitance data lines. (Removing one of the 9-pF scope probes stops the oscillation, and replacing it with a 10-pF capacitor starts it up again.)

The circuit shown in Figure 4 solves these problems by setting up three logic levels: "high" (pulled up to 5V), "pulling low," and "being pulled low." When both sides are idling high, both optocouplers are off. When one side pulls its line below 0.4V (a safe assumption for both open-collector and open-drain outputs), the comparator turns on its LED. The other side's line pulls down to approximately 0.6V, which is still interpreted as a logic low but does not result in that side's LED turning on. When both sides are pulling their lines low, both LEDs are on. In this state, if one side releases its line, it rises cleanly from the low level of the I²C device's output to approximately 0.6V.

Figure 5 shows details of the operation of the circuit in Figure 4. The combination of the LT1719 comparator and Agilent (www.agilent.com) HCPL2300 optoisolator meets the timing requirements of the 400-kHz enhanced I²C-bus specification. Total propagation delay is approximately 100 nsec, and you can adjust the logic thresholds to suit other requirements. Although you can use this circuit for both SDA and SCL lines to support full clock synchronization, the extra circuitry is unnecessary as long as the master never tries to communicate faster than the slowest slave device. If you don't need clock synchronization, you can use a single optocoupler for SCL.

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