Switch-mode supply draws 43-mW standby power

Christophe Basso and Francois Lhermite, Motorola SPS, Toulouse, France -- EDN, 6/10/1999

Switch-mode offline supplies offer better efficiency than linear supplies. However, the efficiency of a switchmode power supply (SMPS) seriously degrades with light loads, and commutation losses provoke power dissipation well above 1W even with no load. A good way to build a low-standby-current SMPS is to use a hysteretic architecture, which delivers high-frequency pulses until the output passes a threshold and then no pulses until the output again drops below the threshold. The SMPS consumes little energy delivering the refreshment pulses. Figure 1 shows a circuit that uses an MC34063 controller IC and an insulated-gate bipolar-transistor (IGBT) output device.

The MC34063 operates in current mode. Q₃ trips the IC when the voltage on sense resistor R₁₆ drops to approximately 550 mV. (I_PEAK=160 mA in this example.) You can adjust the peak current to compensate for the transformer's magnetorestrictive effects. Any transformer you use in an SMPS produces audible noise at a low frequency. You can either buy an expensive transformer whose construction ensures low audible noise or keep peak current low, as in Figure 1's circuit. When reducing the peak current, you need to increase either the primary inductance or the switching frequency (by varying C₈) to keep the output power constant.

The MMG05N60D IGBT has low parasitic capacitance that degrades efficiency at low peak currents. When you open the high-voltage switch in a MOSFET-based flyback converter, the peak current does not immediately drop to zero. Depending on the amount of parasitic capacitance, the current keeps circulating while the drain voltage rises, and efficiency suffers. Figure 2a illustrates this wasteful behavior in a high-voltage, MOSFET-based switcher. The MMG05N60D IGBT has low parasitic capacitance; its total gate charge at V_GS=10V is only 4 nC. Figure 2b shows the current in Figure 1's circuit with zero output power.

The start-up circuit for the MC34063 uses Q₄ and Q₂. When you apply the power main, the voltage on C₁₄ starts to rise. The ratio of R₂₀ and R₂₂ causes Q₄ and Q₂ to remain open. The IC receives no power, and the current that flows in from C₁₄ is small. When the voltage reaches a threshold, Q₄ starts to conduct and pulls Q₂'s gate toward ground. Q₂'s drain voltage rises and strengthens the conduction in Q₄. C₁₄ rapidly discharges into C₁₀, and the MC34063 oscillates. The circuit offers efficiency ranging from 59.4 to 73%. It dissipates no-load power levels of 42.5, 65, and 82.8 mW at dc input voltages of 120, 325, and 360V, respectively.(DI #2363).