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Current-input ADC measures voltages
Jim Todsen, Burr-Brown Corp, Tuscon, AZ -- EDN, 8/19/1999
The first drawback is an unpredictable clock frequency. Peripheral devices that share the same clock with the µP and rely on a stable clock frequency might suffer. One example is an ADC that relies on direct µP control to define the sampling time. The second drawback is the periodic nature of the frequency shift. The technique essentially modulates the clock frequency with an approximately 50-kHz frequency. This frequency is slightly higher than the audio band to prevent audio "hum." In some systems, however, this 50-kHz modulation frequency may be in band with data-acquisition or other sensitive analog circuitry. Under these circumstances, separate nonmodulated digital-control and clock signals are necessary to prevent demodulation of 50-kHz frequency and to prevent analog noise.
Consider the product of two square signals with unity amplitude, x1(t) and x2(t), where x1(t) is a square signal with frequency 
and x2(t) is a square signal with frequency 
in radians (Figure 2a). The Fourier transforms of square waves x1(t) and x2(t) are:
The Fourier transform of the product of x1t and x2t is:
You can limit the series to the first term for simplification:
If is the frequency of the crystal oscillator and is the result of the frequency division of by 128, for example, then you can rewrite the previous equation as follows:
In other words, the frequency peak of x1(t) multiplied by x1(t)/128 splits into two frequency peaks separated by 2X /128. Each peak has half of the energy of the original peak. Figure 2b shows a Matlab-generated spectrum of x1(t) and x(t).
Multiplying the nth harmonic of the original x1(t) signal by x2t splits the nth harmonic into two major frequency components with frequencies nX+/128 and nX–/128. (These product terms are the most significant.) If x2(t) is purely sinusoidal and the frequency analyzer has an unlimited narrow frequency bandwidth, the initial x1(t) nth harmonic splits into two frequency spikes. Each of these spikes is approximately 6 dB µV, or two times, lower than the initial frequency spike. In practice, you can obtain a 4-dBµV reduction. In many cases, this reduction is a lifesaver because it helps the circuit pass an EMI test, particularly when bulky ferrites on each cable turn your portable electronic device into a boat anchor.
Figure 1's circuit realizes this technique using a few simple logic gates. You can obtain x2(t) from the µP timer or the counter by dividing x1(t) by any number—in this example, 128. Flip-flop IC1 locks x2(t) to the crystal oscillator's phase. The XOR gate, IC2, is the key element. Algebraic multiplication of signals x1(t) and x2(t) in Figure 2a is equivalent to the XOR function of x1(t) and x2(t) when they are "logic" signals. IC3A and IC3B compensate for IC1's propagation delay. The output of IC2 routes directly to the clock input of the µP. The resulting signal x(t) experiences two phase shifts over one period of x2(t) (Figure 2a). The first shift of 180° occurs during x2(t)'s transient from logic 0 to logic 1; the second shift of –180° occurs during the transient from logic 1 to logic 0.
From the µP's perspective, the clock signal loses one full period of x1(t) over one full period of x2(t). In this example, if you program the µP's internal timer to 127 cycles, the clock counts 128 cycles of the original crystal frequency.
If you use this technique, you can easily predict the µP's clock behavior. For example, sampling with every period of x2(t) introduces no noise into the ADC's reading. The frequency content of the digital clock and other digital signals contains no low frequencies, such as 50 kHz, so the digital clock does not cause any noise in the analog sections. (DI #2391)
REFERENCE
1.Bolger, Steve, and Samer Omar Darwish, "Use spread-spectrum techniques to reduce EMI," EDN, May 21, 1998, pg 141.
