Switched-capacitor IC forms notch filter

Luca Vassalli, Maxim Integrated Products, Sunnyvale, CA -- EDN, 9/30/1999

You can use a switched-capacitor lowpass filter (LPF) to implement an inexpensive notch filter (Figure 1a). The internal architecture of the IC (Figure 1b) includes summing nodes similar to those nodes that analog-signal-processing stages use for feedback-error generation. The IC lowpass-filters the quantity V_IN2VCOM and adds V_OS at the output. In other words,

V_OUT=(V_IN-V_COM)_LPF+V_OS,

where V_COM typically equals V_DD/2. Thus, the IC adds common-mode voltage (COM) at the input, and an internal resistor divider biases this voltage at midsupply. For applications that require offset adjustment or dc-level-shifting, the IC adds an external bias voltage (OS) at the output.

To obtain a notch response, you simply apply the input signal to both the OS and IN pins of the IC, so that these two signals sum at the output (Figure 1a). Frequencies at OS are limited to about 100 kHz. At low frequencies, the output amplitude equals |V_IN+V_OS|=2|V_IN|. At the frequency for which the lowpass filter's phase response changes by 180°, the two signals sum to near zero, creating the notch frequency. The circuit can easily produce a notch at frequencies of 1 Hz to 10 kHz. At higher frequencies, only the OS signal passes through to the output.

Figure 2a shows the filter response for a 400-Hz notch and a clock frequency of 47.5 kHz. The Q is 1.7, and the center-frequency attenuation is approximately -50 dB. Ripple in the passband limits the notch depth so that the IC's flat passband in the lowpass configuration suits this application. The 180° phase shift occurs at 0.85 f_c, giving the response a smooth -6-dB transition between the prenotch and postnotch frequencies (Figure 2b). The usable input bandwidth is f_clk-f_clk/100, thanks to a 100-to-1 ratio between the f_c and clock frequencies. As with all sampling systems, you must take care to avoid input-signal aliasing.(DI #2416)