BIOS interrupt performs A/D conversion

J Jayapandian, IGCAR, Tamil Nadu, India -- EDN, 3/16/2000

Most A/D-conversion techniques use dedicated hardware, usually a single-chip IC. The flexible conversion technique allows you to use successive-approximation, ramp-type, or other converters by writing the appropriate control software. The design in Figure 1 uses a PC's parallel port for interface to a DAC and a special BIOS interrupt (INT 1CH) for the conversion process. The INT CH hardware interrupt is available in all PCs. It automatically occurs 18.2 times per second; the BIOS-timer interrupt invokes the interrupt after the interrupt updates the time-of-day count. The INT 1CH handler routine activates the hardware in Figure 1. The analog input V_IN connects to the inverting input of the LF356 op amp; the noninverting input connects to the output of the AD574 8-bit DAC. The output current of the DAC follows the digital pattern from the PC's port (you can use the LPT port for 8-bit applications).

The interrupt-handler routine (Listing 1) for INT 1CH sets the required 8-bit digital image for the DAC's input and monitors the Status bit from the op amp's output. You can write the software for any conversion technique. Here, the INT 1CH handler routine, written in Turbo C, implements a counter-ramp conversion technique. The routine in Listing 1 uses INT 1CH and the LPT2 port. The variable Ticker recognizes the occurrence of INT 1CH. For every Ticker, the handler routine writes the incremental data from 0 to 255 to the LPT2 port, and thus to the 8-bit DAC. The handler checks for the zero-status bit by reading the LPT2 port. If it reads a high-to-low transition in the Status bit, the handler writes the final bit pattern (a value between 0 and 255) to the DAC. The op amp compares the value of V_IN with the DAC's output. When the output reaches V_IN, the op amp's output (status) becomes 0V, and the handler stops incrementing the bit pattern presented to the DAC.

This final digital value corresponds to the analog input V_IN. For each occurrence of INT 1CH (Ticker), the design completes a conversion cycle. Make sure that the handler routine does not exceed the time of occurrence of the interrupt. You can implement a successive-approximation converter in the same way with this design by writing an appropriate handler routine. Click here to download Listing 1. (DI #2495).