PC's BIOS interrupt drives twin stepper motors

J Jayapandian, Indira Gandhi Centre for Atomic Research, Kalpakkam, India -- EDN, 9/14/2000

A simple and low-cost design achieves a twin stepper drive using a PC's special BIOS interrupt, INT1Ch, through the PC's parallel port (Figure 1). Turbo C control software programs the parallel port for the task of independently running two stepper motors. Users can write the appropriate control software for the required movement of two independent steppers. Listing 1 is simple program to run the twin steppers in full step-clockwise mode. This program can run the steppers independently through the PC's LPT2 port using a handler routine for the interrupt INT1Ch.

Figure 1 shows a block diagram of the required hardware, which the INT1Ch-handler routine can activate according to user requirements. The variable "TICKER" in the handler routine recognizes the occurrence of INT1Ch. For every occurrence of INT1Ch and thus every occurrence of TICKER, the handler routine writes the DATA necessary for the sequential step to move the stepper clockwise or counter-clockwise to the PC's LPT2 port. Every occurrence of TICKER causes the routine to go through the stepper cycle. The routine sends all the sequential DATA that the routine's SWITCH operator selects to the LPT2 port.

Full-step clockwise movement of the stepper requires four steps for the stepper coil using the following data: 1100, 0110, 0011, and 1001. The corresponding data in hex code are 0x0C, 0x06, 0x03, and 0x09, respectively, for a single stepper. For a twin stepper, the sequential-data pattern is 0xCC, 0x66, 0x33, and 0x99, respectively. The first 4 bits (least significant bits) in the 8-bit data control the first stepper, and the second nibble (most significant bits) control the second stepper. You can properly assign the least significant bits and most significant bits in the data field independently for the different mode of rotation of the steppers.

The handler routine shows identical movement for both steppers, and thus the data pattern for the least significant bits and most significant bits are the same. This sample program writes the variable "DATA" necessary for the step movement of the stepper once for four occurrences of INT1Ch. Because INT1Ch occurs once in 55 msec, the delay is 220 msec. Hence, the on-time of the stepper is fixed at 220 msec. To vary the ontime of the stepper, you can write the handler routine accordingly to change the necessary interrupt occurrences between writing new data for the stepper.