Circuit tests V_COM drivers

Flat-panel LCD monitors offer excellent image quality and more compact form factor than CRTs—hence, their steadily increasing popularity. Unfortunately, the complexity of their manufacturing process makes LCD monitors considerably more expensive than CRTs. The amplifier that drives V_COM, the voltage on the backplane of the LCD panel, must be able to drive large capacitive loads, deliver high peak output currents, and maintain a constant output voltage. This Design Idea describes a simple test to measure the usefulness of an amplifier used as a V_COM driver. First, consider some video theory. Flat-panel television screens differ in the rate at which the screen refreshes. The refresh rate for TVs depends on the standard you use, such as NTSC, PAL, or SECAM. Computers, on the other hand, typically refresh the screen at a 75-Hz rate. A single picture element, or pixel, on an LCD screen comprises three subpixels, one each of red, green, and blue.

Electrically, the subpixels behave like capacitors, storing a certain voltage until the next voltage arrives. Changing the voltages on the subpixels, one row at a time, refreshes the screen. These voltages use V_COM as a reference. The absolute value of the voltage differences, V_COM, represents the brightness of the subpixels. The video signal undergoes inversion on a frame-by-frame basis to ensure that the time average of the pixel voltages is zero, thus preventing screen burnout. The circuit of Figure 1 tests the V_COM driver by applying a square wave to a capacitor array representing the subpixels in the panel. This circuit simulates the worst-case condition, in which all the subpixels switch on or off simultaneously. A pair of high-power, low-on-resistance MOSFETs generates the square wave. A nonoverlapping drive scheme ensures that both MOSFETs do not turn on at the same time. Otherwise, simultaneous conduction would give rise to high shoot-through currents. Figure 2 shows the MOSFETs and the nonoverlapping drive scheme. The drive scheme uses high-speed NAND gates. An RC network at the input of the second NAND gate controls the nonoverlap delay. The first pair of MOSFETs acts as predrivers to provide the current needed to drive the power-MOSFET output stage. Figure 3 shows the nonoverlapping drive to the gates of the output stage. Figure 4 shows the instantaneous peak output current of the AD8565 in Figure 1 in response to a pulse from the test circuit.

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