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MathWorks spins verification and validation add-on for algorithm-modeling tool

By Michael Santarini -- EDN, 3/31/2005

Furthering the Mathworks’ push into the system-level segment of the EDA market, the company has announced its Simulink verification and validation add-on for Simulink. In the last couple of years, the MathWorks' technology has moved from being popular in the DSP and embedded market to also becoming an IC-system-level hardware-modeling tool allowing users to create algorithms representing IC system functions and then partitioning those functions for hardware or software implementations.

Arun Mulpur, DSP product-marketing manager at The MathWorks, says that the add-on will help system designers and test engineers perform continuous testing and verification throughout the development process. With the tool, engineers can produce a validated executable specification by formally testing systems and algorithms during the modeling and simulation phase. Users can generate coverage reports to view untested design elements and identify errors early in the cycle before partitioning the system to hardware and software.

“By adding verification and validation at the Simulink level, even without writing a single line of VHDL, you can plan how to test your system design,” says Mulpur. The tool tells you how much of the model the test suite is covering, he says. The generated reports provide industry-standard metrics and displays them in the model, allowing users to traverse the model for missing coverage and to navigate trouble spots.

Users can also include Simulink Verification and Validation comments in embedded code that the Real-Time Workshop embedded coder generates. It allows user to keep track of the design and validation path and cuts down on code-traceability analysis. The Simulink Verification and Validation add-on to Simulink sells for $1000.

The MathWorks, www.mathworks.com.

 

 



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