Sine construction: DDSs form precision oscillators

Digital-based signal-processing blocks are often architecturally reminiscent of their analog forebears, as their underlying mathematics demonstrate. For example, the parallel manipulations of Fourier and Z transforms, which continuous- and discrete-time filter designs exploit, form expressions of like shape and order. Other examples of parallel structures abound. Indeed, nonanalogous structures are unusual among basic functions that enjoy both linear and digital implementations. As a result, digital circuits often use numeric representations for the same physical phenomena that analog circuits codify as voltages or currents.

The DDS (direct digital synthesizer), also known as the NCO (numerically controlled oscillator), stands in contrast. Unlike most frequency generators, the DDS does not exploit a tuned feedback loop, but rather constructs its output waveform directly in digital form. The resulting structure is remarkably versatile, given its simplicity, having found use in applications as diverse as automotive radios, data-communications systems, and medical imagers. Just as diverse are the forms NCOs take: IP (intellectual property), ICs, cards, and instruments are all available from multiple vendors.

The range of DDS applications do more than make interesting stopping points along a technology tour. They inform the range of requirements digital synthesizers must meet and the range of frequency-synthesis issues with which both IC and OEM designers must contend. Among the beneficial attributes NCOs offer are phase-continuous frequency shifting and constant amplitude through a tuning interval. Such signal sources also provide fine frequency and phase tuning under digital control. For systems that exploit frequency-hopping algorithms, NCOs provide fast hopping without significant undershoot or overshoot (Reference 1). In quadrature applications, a DDS can provide an I and Q channel pair with unequaled amplitude matching and phase alignment and do so at a comparatively low cost. The DDS also offers excellent frequency and amplitude stability over time and temperature with few parametric dependencies.

A DDS starts with a timebase—usually a crystal oscillator—and a register that contains Δθ, the phase-increment datum, also called the tuning word (Figure 1). With each clock cycle, a phase accumulator adds Δθ to the previously accumulated phase θ(T), so that at any given time,

and θ(0) is usually zero. Angular velocity is generically given by

or, expressed in the discrete-time terms of sampled systems,

Assuming an n-bit phase accumulator absent a midcycle reset, the angular velocity relates to the timebase as

and, by extension, the relationship between output and input frequency is given by

This last expression points to an advantage DDSs have over PLL-based frequency generators: Here, the tuning word is in the numerator, which provides constant tuning resolution across the circuit's tuning range; in a PLL structure, the tuning datum appears in the denominator.

One potential source of aliasing limits the tuning-word width such that

If N is the largest value the tuning word can hold and if you allow m to equal n, then an aliased image can result whenever the register contents exceed N/2—an expression of the Nyquist limit in the phase domain. The case of Δθ=N–1, for example, results in the same output frequency as Δθ=1, except that the phase accumulator appears to decrement instead of increment. This second "negative-frequency" image that extends from Δθ=N/2 to Δθ=N mirrors the primary image that extends from Δθ=0 to Δθ=N/2 except for the phase direction. Requiring m–n≥1 eliminates the second image.

The phase accumulator serves as an index pointer into an m×n look-up table containing the waveform's sample data—nominally sine(θ). The look-up table, often implemented as a PROM, in turn feeds the output DAC and a lowpass output filter, which removes the out-of-band spectral artifacts caused by DAC steps. Truncation errors, always an issue when mapping a continuous phenomenon on a discrete number system, also create spectral artifacts, which can be problematic for applications, such as medical imaging, that demand high spectral purity. This trait tends to increase word widths. Minimizing the DAC steps or increasing the tuning resolution expands the look-up-table length. Fortunately, several methods exist that help reduce the PROM space required to construct the look-up table.

For example, the sine function exhibits twofold symmetry. As a result, the function's first quadrant contains all the numeric information of a full cycle. A relatively simple manipulation of the first-quadrant data regenerates the full cycle for the DAC and reduces the required PROM space by 75%. Observing that

provides the necessary mapping. The accumulator's two MSBs indicate the quadrant; the values 0 to 2^M–2–1 determine the phase within the quadrant. Applying this technique to generate output values of 0 to 2^P–1 results in:

Quadrant folding is not the only method of reducing PROM space. Some DDS designers have used the fact that they can approximate the sine function with the first few terms of a Taylor series expansion. This approach was impractical for early designs, but great reductions in the cost, size, and energy requirements of computational resources during the ensuing decades have rendered the method feasible.

Applications that require a high degree of amplitude flatness over their tuning range can also force longer look-up tables. Sampled systems impose a sinc transfer function, which can force an oversampling ratio far greater than that suggested by the Nyquist limit. For example, a sample-rate-to-signal-rate ratio of 12-to-1 results in about 0.1 dB of attenuation. Reducing the ratio to 6-to-1 increases the attenuation to 0.4 dB. At Nyquist, the attenuation reaches 3.9 dB. To improve the system's amplitude flatness over what the sinc characteristic offers without extending the look-up-table length to accommodate high oversampling ratios, some DDS designs introduce an inverse-sinc filter between the look-up table and the DAC's input (Figure 2). Such approaches can offer amplitude flatness within ±0.1 dB at corner frequencies as high as 0.4 MHz.

Of the error sources that degrade DDS performance, many originate with the DAC and its signal environment. They include glitch energy due to nonsimultaneous switching times within the DAC structure, DNL (differential-nonlinearity) and INL (integral-nonlinearity) errors due to bit-weight errors and their worst-case accumulation, and clock feedthrough due to parasitic coupling mechanisms within the DAC and within the pc-board layout (see sidebar "For further study: EOEM online RFIC-layout tutorial"). Other error terms derive from truncation—a necessary result of digitally representing continuous phenomena such as phase and frequency. These error terms generate spurs in the DDS's output spectrum. Provided that the design respects certain constraints on the word widths at the various DDS stages, truncation spurs appear in predictable spectral locations with calculable amplitudes (Reference 2).

The popularity of NCOs stems from their simplicity, their few drift terms, and their ability to maintain continuous phase and constant amplitude while providing agile tunability. A DDS can realize a variety of modulation schemes with little additional complexity; in the case of IC implementations, the additional circuitry that is required is most often integratable with the DDS logic.

Some modulation methods, however, place performance demands where at first glance you might not expect them. FSK (frequency-shift-keying) modulation, for example, simply requires an architecture that allows the input data stream to modify the tuning word (Figure 3). Here,

where d_I(T) is the input datum at sample time T. Variations on the theme, such as GMSK (gaussian-minimum-shift keying) and ramped-FSK modulation don't snap the tuning word, Δθ. Rather, they require sufficient control-interface bandwidth to support spectral-shaping during the frequency transitions by algorithmically moving between values (Reference 3).

In the limit of frequency resolution during transitions, such structures track a data stream representing a dynamic signal, at which point you essentially have digital FM. In a digital FM modulator, an adder takes the place of the original FSK register pair (Figure 4). The accumulator operates on the sum of the carrier tuning word and the input-data stream:

where Δθ_C is the carrier tuning word and d_I(T) is the modulating input data stream.

Similarly, an adder helps construct a DDS-based PSK (phase-shift-keying) modulator, but, in this case, the sum applies to the accumulator's output instead of its input, as with FM:

The added circuit bits integrate easily with other required DDS-logic blocks (Figure 5). Though conceptually simpler than FM, digital AM requires a multiplier stage ahead of the DAC, which is more complicated from a circuit perspective than the adder that digital FM modulators use. Because the DAC is a mixed-signal multiplier, a DDS can also form an AM modulator for analog-signal inputs, given appropriate signal conditioning and summation with the DAC's reference source voltage (Figure 6).

Though you can purchase DDS ICs as clock sources or in instrument form as precision timebases, they are increasingly appearing as blocks within more highly integrated devices, particularly in digital communications. (To read the original paper that introduced the DDS structure, see Reference 4.)

Author Information

You can reach Technical Editor Joshua Israelsohn at jisraelsohn@edn.com.