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Processor proliferation provides application match
-- EDN, 11/23/2000
The surge in new processors, ranging from cores to microcontrollers to devices with unique add-in features, is starting to rival the diversity in analog components, such as op amps. For example, Motorola's latest MPC500 family entry, the PowerPC MPC565 for automotive OEM applications, includes 1 Mbyte of flash EE-PROM, so it can take on complex embedded tasks, such as power-train control. This 56-MHz processor operates from a 2.6V supply for internal functions and supports 5V I/O operation for peripheral compatibility. In addition to the flash memory, it includes 46 kbytes of static RAM, a four-bank memory controller, and a trio of timer-processor units; each timer is a 32-bit, 28-MIPS RISC engine.The device doesn't skimp on peripherals, either. It has UART and SPI functions, three CAN (controller-area-network) interfaces, and a J1850 interface. The available development tools let you set nonbreak debugging as well as backward-compatible background-debugging modes. The processor operates at -40 to +125°C, commensurate with the target application's needs.
The Atmel T89SC256C microcontroller with 256-kbyte flash memory is an 8/16-bit secure processor targeting smart-card and other secure applications, such as electronic books and card readers. The company based the device on an enhanced 8051 architecture. It includes an embedded fast-arithmetic crypto-coprocessor, which supports RSA (Rivest, Shamir, and Adleman) computation as large as 2048 bits. Working with the 24-MHz processor, driven by a tunable internal clock, the crypto-coprocessor performs a 1024-bit RSA computation with Chinese Remainder Theorem in 90 msec.
Security features for this processor include a true-random-number generator, a secure memory-management unit, and a memory error-detection and -correction mechanism. The microcontroller includes both UART and SPI communication interfaces. The IC consumes 10 mA at 5V and 5 mA at 3V. The Atmel microcontroller costs $7 (100,000).
For a high-speed microcontroller, also based on and compatible with the venerable 8051 architecture, Dallas Semiconductor has introduced the DS89C420 ultra-high-speed device. This microcontroller executes one instruction per clock cycle and operates as fast as 50 MHz with a clock. It includes two data pointers that enable you to move data blocks both backward and forward, 13 interrupt sources at five priority levels, three 16-bit counter/timers, and a watchdog timer. To minimize overall power consumption, the device selects a processing speed based on software input and maintains all of its processes at lower-speed states without shutting down.
The 50-MIPS-peak device also includes 16 kbytes of flash memory, which you can program at different points in the manufacturing cycle or even in the final application. The flash memory has three programming modes. In in-system mode, the on-chip boot loader opens the flash memory to access via the IC's serial port. For in-application mode, using internal memory-management logic, you can execute application software in one block of memory while reprogramming the other block and then switch the blocks, execute from the newly reprogrammed block, and erase and reprogram the first block. Finally, you can revert to standard external flash or EEPROM programming units for the function. Dallas Semiconductor's DS89C420 costs $10.10 (25,000), and you can reduce your system cost by using a lower cost, lower speed crystal to drive the device's clock input via an on-board clock multiplier.
Further enhancing its microcontroller-core ST10 line, STMicroelectronics now has added a core with both single-instruction-per-cycle execution and a DSP for real-time control applications. The Super10 core targets hard-disk- drive; automotive; and consumer applications, such as two-stage, head-positioning servos that can benefit from a DSP for algorithm execution as well as fast interrupt-based context switching (Picture).
By providing two local register banks, the Super10 core can respond to interrupts with zero-cycle context switching. In addition, an interrupt-jump cache lets the interrupt controller transfer a 24-bit service-routine start address to the CPU without a time-overhead penalty. Software tools for this core let you develop C and C++ code; real-time emulation boards are available through third-party vendors. Power consumption for this 0- to 150-MHz core is 0.2 to 0.5 mW/MHz.
Atmel Corp, www.atmel-wm.com. at www.rscahners.ims.ca/ednmag/.
Motorola Inc, www.motorola.com. at www.rscahners.ims.ca/ednmag/.
Dallas Semiconductor, www.dalsemi.com. at www.rscahners.ims.ca/ednmag/.
STMicroelectronics, www.st.com. at www.rscahners.ims.ca/ednmag/.
-by Bill Schweber
