FROM EDN EUROPE: CMOS amplifier ICs reduce noise to bipolar levels

For analogue circuits that need both dc precision and low noise, the designer's conventional choice has been to use a bipolar IC; you can now get the same performance from a new class of CMOS amplifier. Linear Technologies' LTC6241/2 are dual/quad amplifier, 18-MHz gain-bandwidth chips that feature noise levels of 550 nVp-p in the 0.1- to 10-Hz region, which the company says is a three-fold reduction over what you could previously obtain from a CMOS part. The amplifiers' dc parameters include 1pA bias current and less than 125 µV input offset voltage. Offset voltage drift is under 2.5 µV/C while the voltage gain of 124 dB keeps system error to a minimum. Slew rate is 10 V/µsec for a supply current of 2.2 µA.

You can use the ICs in instrumentation, medical or communications designs that need a high impedance input (input capacitance is 3 pF), where previously you might have considered a chopper-stabilised amplifier (with poorer noise performance) or a more expensive solution with bipolar or BiFET parts.

The ICs will operate rail-rail outputs down to 2.8V supply voltage, or up to 12V in a higher-voltage variant. Packaging options include the DFN package, 3×3 mm for the dual amplifier part and 5×5 mm for the quad. Available temperature ranges are commercial and industrial; pricing is $1.25 and $2.25 (1000), respectively.

Linear Technology, www.linear.com.